Browsing by Author Doria, Rodrigo Trevisoli

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Showing results 1 to 8 of 8
Issue DateTitleAuthor(s)
2016Analytical Model for the Dynamic Behavior of Triple-Gate Junctionless Nanowire TransistorsTREVISOLI, RENAN; Doria, Rodrigo Trevisoli; DE SOUZA, Michelly; BARRAUD, SYLVAIN; VINET, MAUD; Pavanello, Marcelo Antonio
2019Compact Modeling of Triple Gate Junctionless Mosfets for Accurate Circuit Design in a Wide Temperature RangePavanello, Marcelo A.; CERDEIRA, Antonio; Doria, Rodrigo Trevisoli; RIBEIRO, Thales Augusto; HERRERA, FERNANDO AVILA; ESTRADA, MAGALI
2017Harmonic distortion analysis of triple gate SOI nanowire MOSFETS down to 100 KPAZ, Bruna Cardoso; Doria, Rodrigo Trevisoli; CASSÉ, MIKAËL; BARRAUD, SYLVAIN; REIMBOLD, GILLES; VINET, MAUD; FAYNOT, OLIVIER; Pavanello, Marcelo Antonio
2013Low-frequency noise of n-type triple gate FinFETs fabricated on standard and 45° rotated substratesDoria, Rodrigo Trevisoli; MARTINO, J. A.; SIMOEN, Eddy; CLAEYS, Cor; PAVANELLO, Marcelo A.;PAVANELLO, M. A.;PAVANELLO, M.;PAVANELLO, M.A.;PAVANELLO, MARCELO;ANTONIO PAVANELLO, MARCELO
2019Modeling the interface traps-related low frequency noise in triple-gate SOI junctionless nanowire transistorsTREVISOLI, RENAN; Doria, Rodrigo Trevisoli; BARRAUD, SYLVAIN; Pavanello, Marcelo Antonio
2016On the improvement of DC analog characteristics of FD SOI transistors by using asymmetric self-cascode configurationDE SOUZA, Michelly; FLANDRE, Denis; Doria, Rodrigo Trevisoli; TREVISOLI, RENAN; Pavanello, Marcelo Antonio
2018Physical Insights on the Dynamic Response of SOI n- and p-Type Junc-tionless Nanowire TransistorsDoria, Rodrigo Trevisoli; TREVISOLI, RENAN; DE SOUZA, Michelly; Pavanello, Marcelo Antonio
2018Static and dynamic compact analytical model for junctionless nanowire transistorsPavanello, Marcelo Antonio; TREVISOLI, RENAN; Doria, Rodrigo Trevisoli; de Souza, Michelly