Browsing by Author MARTINO, João Antonio

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Issue DateTitleAuthor(s)
2009Cryogenic Operation of FinFETs Aiming at Analog ApplicationsPAVANELLO, Marcelo A.; MARTINO, João Antonio; SIMOEN, Eddy; CLAEYS, Cor
2006Cryogenic operation of graded-channel silicon-on-insulator nMOSFETs for high performance analog applicationsPAVANELLO, Marcelo A.; AGOPIAN, Paula Ghedini Der; MARTINO, João Antonio; FLANDRE, Denis
2006Evaluation of graded-channel SOI MOSFET operation at high temperaturesGALETI, Milene; PAVANELLO, Marcelo A.; MARTINO, João Antonio
2007Evaluation of triple-gate FinFETs with SiO2-HfO2-TiN gate stack under analog operationPAVANELLO, Marcelo A.; MARTINO, João Antonio; SIMOEN, Eddy; ROOYACKERS, Rita; COLLAERT, Nadine; CLAEYS, Cor
2006Gain improvement in operational transconductance amplifiers using Graded-Channel SOI nMOSFETSGIMENEZ, Salvador Pinillos; PAVANELLO, Marcelo A.; MARTINO, João Antonio; FLANDRE, Denis
2011Harmonic distortion of 2-MOS structures for MOSFET-C filters implemented with n-type unstrained and strained FINFETSDORIA, Rodrigo Trevisoli; SIMOEN, Eddy; CLAEYS, Cor; MARTINO, João Antonio; PAVANELLO, Marcelo A.; PAVANELLO, M. A.
2010Harmonic Distortion of Unstrained and Strained FinFETs Operating in SaturationDORIA, Rodrigo Trevisoli; CERDEIRA, Antonio; MARTINO, João Antonio; SIMOEN, Eddy; CLAEYS, Cor; PAVANELLO, Marcelo A.
2005High performance analog operation of double gate transistors with the graded-channel architecture at low temperaturesPAVANELLO, Marcelo A.; MARTINO, João Antonio; RASKIN, Jean Pierre; FLANDRE, Denis
2005Impact of halo implantation on 0.13?m floating body partially depleted SOI n-MOSFETs in low temperature operationPAVANELLO, Marcelo A.; MARTINO, João Antonio; SIMOEN, Eddy; CLAEYS, Cor
2016Improved operation of graded-channel SOI nMOSFETs down to liquid helium temperaturePavanello, Marcelo Antonio; SOUZA, Michelly de; RIBEIRO, Thales Augusto; MARTINO, João Antonio; FLANDRE, D.
2015In-depth low frequency noise evaluation of substrate rotation and strain engineering in n-type triple gate SOI FinFETsDORIA, RODRIGO T.; SOUZA, M. A. S.; MARTINO, João Antonio; SIMOEN, Eddy; CLAEYS, Cor; PAVANELLO, Marcelo A.
2007Low temperature influence on the uniaxially strained FD SOI nMOSFETs behaviorSOUZA, Michelly de; PAVANELLO, Marcelo A.;PAVANELLO, M. A.;PAVANELLO, M.;PAVANELLO, M.A.;PAVANELLO, MARCELO;ANTONIO PAVANELLO, MARCELO; MARTINO, João Antonio; SIMOEN, Eddy; CLAEYS, Cor
2010Performance of Source Follower Buffers Implemented with Standard and Strained Triple-Gate nFinFETsPAVANELLO, Marcelo A.; MARTINO, João Antonio; SIMOEN, Eddy; ROOYACKERS, Rita; COLLAERT, Nadine; CLAEYS, Cor
2007The low-frequency noise behaviour of graded-channel SOI nMOSFETsSIMOEN, Eddy; CLAEYS, Cor; CHUNG, Tsu Ming; FLANDRE, Denis; PAVANELLO, Marcelo A.; MARTINO, João Antonio; RASKIN, Jean Pierre
2009Trapezoidal SOI FinFET analog parameters? dependence on cross-section shapeBUHLER, R. T.; GIACOMINI, R. C.; PAVANELLO, Marcelo A.; MARTINO, João Antonio
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