Browsing by Author COLINGE, J. -P.
Showing results 1 to 6 of 6
| Issue Date | Title | Author(s) |
| 2011 | Analog Operation Temperature Dependence of nMOS Junctionless Transistors Focusing on Harmonic Distortion | DORIA, Rodrigo Trevisoli; YU, R.; KRANTI, Abhinav; COLINGE, J. -P.; PAVANELLO, Marcelo A.; PAVANELLO, M. A.; TREVISOLI, Renan Doria; DE SOUZA, Michelly; LEE, C. W.; FERAIN, Isabelle; DEHDASHTI-AKHAVAN, N.; YAN, R.; RAZAVI, P. |
| 1997 | Analytical Modeling of the Substrate Effect on Accumulation-Mode SOI pMOSFETs at Room Temperature and at 77 K | PAVANELLO, Marcelo A.; MARTINO, João Antonio; COLINGE, J. -P. |
| 1997 | Analytical Modeling of the Substrate Influences on Accumulation-Mode SOI pMOSFETs at Room Temperature and at Liquid Nitrogen Temperature | PAVANELLO, Marcelo A.; MARTINO, João Antonio; COLINGE, J. -P. |
| 2011 | Cryogenic Operation of Junctionless Nanowire Transistor | DE SOUZA, Michelly; PAVANELLO, Marcelo A.; PAVANELLO, M. A.; TREVISOLI, Renan Doria; DORIA, Rodrigo Trevisoli; COLINGE, J. -P. |
| 2011 | Junctionless Multiple-Gate Transistors for Analog Applications | DORIA, Rodrigo Trevisoli; YU, R.; KRANTI, Abhinav; COLINGE, J. -P.; PAVANELLO, Marcelo A.; Pavanello, Marcelo Antonio; TREVISOLI, Renan Doria; DE SOUZA, Michelly; LEE, C. W.; FERAIN, Isabelle; DEHDASHTI-AKHAVAN, N.; YAN, R.; RAZAVI, P. |
| 1997 | Substrate Influences on Fully Depleted Enhancement Mode SOI MOSFETs at Room Temperature and at 77 K | PAVANELLO, Marcelo A.; MARTINO, João Antonio; COLINGE, J. -P. |
