Browsing by Author Doria, Rodrigo Trevisoli
Showing results 1 to 8 of 8
Issue Date | Title | Author(s) |
2016 | Analytical Model for the Dynamic Behavior of Triple-Gate Junctionless Nanowire Transistors | TREVISOLI, RENAN; Doria, Rodrigo Trevisoli; DE SOUZA, Michelly; BARRAUD, SYLVAIN; VINET, MAUD; Pavanello, Marcelo Antonio |
2019 | Compact Modeling of Triple Gate Junctionless Mosfets for Accurate Circuit Design in a Wide Temperature Range | Pavanello, Marcelo A.; CERDEIRA, Antonio; Doria, Rodrigo Trevisoli; RIBEIRO, Thales Augusto; HERRERA, FERNANDO AVILA; ESTRADA, MAGALI |
2017 | Harmonic distortion analysis of triple gate SOI nanowire MOSFETS down to 100 K | PAZ, Bruna Cardoso; Doria, Rodrigo Trevisoli; CASSÉ, MIKAËL; BARRAUD, SYLVAIN; REIMBOLD, GILLES; VINET, MAUD; FAYNOT, OLIVIER; Pavanello, Marcelo Antonio |
2013 | Low-frequency noise of n-type triple gate FinFETs fabricated on standard and 45° rotated substrates | Doria, Rodrigo Trevisoli; MARTINO, J. A.; SIMOEN, Eddy; CLAEYS, Cor; PAVANELLO, Marcelo A.;PAVANELLO, M. A.;PAVANELLO, M.;PAVANELLO, M.A.;PAVANELLO, MARCELO;ANTONIO PAVANELLO, MARCELO |
2019 | Modeling the interface traps-related low frequency noise in triple-gate SOI junctionless nanowire transistors | TREVISOLI, RENAN; Doria, Rodrigo Trevisoli; BARRAUD, SYLVAIN; Pavanello, Marcelo Antonio |
2016 | On the improvement of DC analog characteristics of FD SOI transistors by using asymmetric self-cascode configuration | DE SOUZA, Michelly; FLANDRE, Denis; Doria, Rodrigo Trevisoli; TREVISOLI, RENAN; Pavanello, Marcelo Antonio |
2018 | Physical Insights on the Dynamic Response of SOI n- and p-Type Junc-tionless Nanowire Transistors | Doria, Rodrigo Trevisoli; TREVISOLI, RENAN; DE SOUZA, Michelly; Pavanello, Marcelo Antonio |
2018 | Static and dynamic compact analytical model for junctionless nanowire transistors | Pavanello, Marcelo Antonio; TREVISOLI, RENAN; Doria, Rodrigo Trevisoli; de Souza, Michelly |