Browsing by Author MARTINO, João Antonio

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Issue DateTitleAuthor(s)
2005Advantages of the Graded-Channel SOI FD MOSFET for Application as a Quasi-Linear ResistorCERDEIRA, Antonio; ALEMÁN, Miguel; PAVANELLO, Marcelo A.; MARTINO, João Antonio; VANCAILLIE, Laurent; FLANDRE, Denis
2000An Asymmetric Channel SOI nMOSFET for Reducing Parasitic Effects and Improving Output CharacteristicsPAVANELLO, Marcelo A.; MARTINO, João Antonio; DESSARD, V.; FLANDRE, Denis
2002Analog Circuit Design Using Graded-Channel Silicon-On-Insulator NMOSFETSPAVANELLO, Marcelo A.; MARTINO, João Antonio; FLANDRE, Denis
2000Analog Performance and Application of Graded-Channel fully depleted SOI MOSFETsPAVANELLO, Marcelo A.; MARTINO, João Antonio; DESSARD, V.; FLANDRE, Denis
2011Analog performance of SOI nMuGFETs with different TiN gate electrode thickness and high-k dielectricsGALETI, M.; Rodrigues, M.; COLLAERT, N.; SIMOEN, E.; CLAEYS, C.; MARTINO, João Antônio
2008Analog Performance of Standard and Strained Triple-Gate Silicon-On-Insulator nFINFETSPAVANELLO, Marcelo A.; MARTINO, João Antonio; SIMOEN, Eddy; ROOYACKERS, Rita; COLLAERT, Nadine; CLAEYS, Cor
2005Analysis of Temperature Induced Saturation Threshold Voltage Degradation in Deep-Submicrometer Ultrathin SOI MOSFETsPAVANELLO, Marcelo A.; MARTINO, João Antonio; SIMOEN, Eddy; CLAEYS, Cor
2012Analysis of temperature variation influence on the analog performance of 45° rotated triple-gate nMuGFETsPAVANELLO, Marcelo A.; DE SOUZA, Michelly; MARTINO, João Antonio; SIMOEN, Eddy; CLAEYS, Cor
1999Analysis of transition region and accumulation layer effect in the subthreshold slope in SOI nMOSFETs and their influences on the interface trap density extractionSonnenberg, Victor; MARTINO, João Antonio
2007Analysis of uniaxial and biaxial strain impact on the linearity of fully depleted SOI nMOSFETsPAVANELLO, Marcelo A.; MARTINO, João Antonio; SIMOEN, Eddy; CLAEYS, Cor
1997Analytical Modeling of the Substrate Effect on Accumulation-Mode SOI pMOSFETs at Room Temperature and at 77 KPAVANELLO, Marcelo A.; MARTINO, João Antonio; COLINGE, J. -P.
1997Analytical Modeling of the Substrate Influences on Accumulation-Mode SOI pMOSFETs at Room Temperature and at Liquid Nitrogen TemperaturePAVANELLO, Marcelo A.; MARTINO, João Antonio; COLINGE, J. -P.
2000Caracterização Elétrica de Filmes de Níquel Obtidos por Depsição Química Espontânea sobre Aluminio, através de Capacitores MOSSONNENBERG, V.;SONNENBERG, V;Sonnenberg, Victor; NAVIA, Alan Rodrigues; MARQUES, Angelo e B; MARTINO, João Antonio; SANTOS FILHO, Sebastião G dos
2009Cryogenic Operation of FinFETs Aiming at Analog ApplicationsPAVANELLO, Marcelo A.; MARTINO, João Antonio; SIMOEN, Eddy; CLAEYS, Cor
2006Cryogenic operation of graded-channel silicon-on-insulator nMOSFETs for high performance analog applicationsPAVANELLO, Marcelo A.; AGOPIAN, Paula Ghedini Der; MARTINO, João Antonio; FLANDRE, Denis
2005Estudo do Comportamento da Resistência Série em Transistores SOI MOSFETS de Camada FinaNICOLETT, A. S.; SONNENBERG, Victor; MARTINO, João Antonio
2005Estudo do Comportamento da Resistência Série em Transistores SOI nMOSFET's de Camada FinaSONNENBERG, V.;SONNENBERG, V;Sonnenberg, Victor; NICOLETT, Aparecido S; MARTINO, João Antonio
2007Estudo dos efeitos da depleção do silício policristalino e da corrente de tunelamento em capacitores MOSSONNENBERG, V.; RODRIGUES, M.;Rodrigues, M.;RODRIGUES, MICHELE; MARTINO, João Antonio
2007Estudo dos efeitos da depleção do silício policristalino e da corrente de tunelamento em capacitores MOSSONNENBERG, V.;SONNENBERG, V;Sonnenberg, Victor; RODRIGUES, Michele; MARTINO, João Antonio
2006Evaluation of graded-channel SOI MOSFET operation at high temperaturesGALETI, Milene; PAVANELLO, Marcelo A.; MARTINO, João Antonio
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