Browsing by Author TREVISOLI, R D

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Showing results 1 to 7 of 7
Issue DateTitleAuthor(s)
2011Analog Operation Temperature Dependence of nMOS Junctionless Transistors Focusing on Harmonic DistortionDORIA, R. T.; YU, R.; KRANTI, A.; COLINGE, J. P.; PAVANELLO, M. A.; TREVISOLI, R D; SOUZA, M.; LEE, C. W.; FERAIN, I.; DEHDASHTI-AKHAVAN, N.; YAN, R.; RAZAVI, P.
2017Effect of the Back Bias on the Analog Performance of Standard FD and UTBB Transistors-Based Self-Cascode StructuresDORIA, R.T.; FLANDRE, D.; TREVISOLI, R D; DE SOUZA, Michelly; PAVANELLO, M. A.
2012Impact of the Series Resistance in the I-V Characteristics of Junctionless Nanowire Transistors and its dependence on the TemperatureDORIA, R. T.; TREVISOLI, R D; DE SOUZA, M.; PAVANELLO, M. A.
2014Low-Frequency Noise and Effective Trap Density of Short Channel P- and N-Types Junctionless Nanowire TransistorsDORIA, Rodrigo Trevisoli; TREVISOLI, R D; DE SOUZA, Michelly; PAVANELLO, M. A.
2013A physically-based threshold voltage definition, extraction and analytical model for junctionless nanowire transistorsTREVISOLI, R D; DORIA, Rodrigo Trevisoli; DE SOUZA, Michelly; PAVANELLO, Marcelo A.
2012Surface Potential-Based Drain Current Analytical Model for Triple-Gate Junctionless Nanowire TransistorsTREVISOLI, R D; DORIA, R. T.; DE SOUZA, Michelly; DAS, Samaresh; FERAIN, I.; PAVANELLO, Marcelo A.
2012Surface-Potential-Based Drain Current Analytical Model for Triple-Gate Junctionless Nanowire TransistorsTREVISOLI, R D; DORIA, R. T.; DE SOUZA, M.; DAS, S; FERAIN, I.; PAVANELLO, M. A.