Browsing by Author TREVISOLI, Renan Doria

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Showing results 1 to 13 of 13
Issue DateTitleAuthor(s)
2011Analog Operation Temperature Dependence of nMOS Junctionless Transistors Focusing on Harmonic DistortionDORIA, Rodrigo Trevisoli; YU, R.; KRANTI, Abhinav; COLINGE, J. -P.; PAVANELLO, Marcelo A.; PAVANELLO, M. A.; TREVISOLI, Renan Doria; DE SOUZA, Michelly; LEE, C. W.; FERAIN, Isabelle; DEHDASHTI-AKHAVAN, N.; YAN, R.; RAZAVI, P.
2013Charge-based continuous model for long-channel Symmetric Double-Gate Junctionless TransistorsCERDEIRA, Antonio; CUETO, Magali Estrada; INIGUEZ, Benjamin; TREVISOLI, Renan Doria; DORIA, Rodrigo Trevisoli; DE SOUZA, Michelly; Pavanello, Marcelo Antonio
2011Cryogenic Operation of Junctionless Nanowire TransistorDE SOUZA, Michelly; PAVANELLO, Marcelo A.; PAVANELLO, M. A.; TREVISOLI, Renan Doria; DORIA, Rodrigo Trevisoli; COLINGE, J. -P.
2011Direct determination of threshold condition in DG-MOSFETs from the gm/ID curveCunha, Ana Isabela Araújo; PAVANELLO, Marcelo A.; TREVISOLI, Renan Doria; GALUP-MONTORO, C.; Schneider, Marcio Cherem
2010Extraction of Mobility Degradation and Source-and-Drain Resistance in MOSFETsMUCI, Juan; LATORRE-REY, A. D.; GARCIA-SANCHEZ, Francisco; LUGO-MUÑOZ, D.; ORTIZ-CONDE, Adelmo; HO, C. S.; LIOU, J. J.; PAVANELLO, Marcelo A.; TREVISOLI, Renan Doria
2015Extraction of the interface trap density energetic distribution in SOI Junctionless Nanowire TransistorsTREVISOLI, Renan Doria; DORIA, Rodrigo Trevisoli; DE SOUZA, Michelly; Pavanello, Marcelo Antonio
2011Junctionless Multiple-Gate Transistors for Analog ApplicationsDORIA, Rodrigo Trevisoli; YU, R.; KRANTI, Abhinav; COLINGE, J. -P.; PAVANELLO, Marcelo A.; Pavanello, Marcelo Antonio; TREVISOLI, Renan Doria; DE SOUZA, Michelly; LEE, C. W.; FERAIN, Isabelle; DEHDASHTI-AKHAVAN, N.; YAN, R.; RAZAVI, P.
2014Substrate Bias Influence on the Operation of Junctionless Nanowire TransistorsTREVISOLI, Renan Doria; DORIA, Rodrigo Trevisoli; DE SOUZA, Michelly; PAVANELLO, Marcelo A.
2014The Roles of the Gate Bias, Doping Concentration, Temperature and Geometry on the Harmonic Distortion of Junctionless Nanowire Transistors Operating in the Linear RegimeDORIA, Rodrigo Trevisoli; TREVISOLI, Renan Doria; DE SOUZA, Michelly; CUETO, Magali Estrada; CERDEIRA, Antonio; Pavanello, Marcelo Antonio
2014The Roles of the Gate Bias, Doping Concentration, Temperature and Geometry on the Harmonic Distortion of Junctionless Nanowire Transistors Operating in the Linear RegimeDORIA, Rodrigo Trevisoli; TREVISOLI, Renan Doria; SOUZA, Michelly de;DE SOUZA, M.;DE SOUZA, MICHELLY;Michelly de Souza;de Souza, Michelly; CUETO, Magali Estrada; CERDEIRA, Antonio; PAVANELLO, Marcelo A.
2012The Zero Temperature Coefficient in Junctionless Nanowire TransistorsTREVISOLI, Renan Doria; DORIA, Rodrigo Trevisoli; DE SOUZA, Michelly; DAS, Samaresh; FERAIN, Isabelle; PAVANELLO, Marcelo A.; Pavanello, Marcelo A.
2011Threshold voltage in junctionless nanowire transistorsTREVISOLI, Renan Doria; DORIA, Rodrigo Trevisoli; DE SOUZA, Michelly; PAVANELLO, Marcelo A.; Pavanello, Marcelo Antonio
2013Trap density characterization through low-frequency noise in junctionless transistorsDORIA, R. T.; TREVISOLI, Renan Doria; DE SOUZA, Michelly; Pavanello, Marcelo Antonio