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Simulation of miller OpAmp analog circuit with FinFET transistors
(2012-03-17) CONTRERAS, E.; CERDEIRA, A.; Marcelo Antonio Pavanello
In this paper we present a methodology to use the Symmetric Doped Double-Gate Model implemented in Verilog-A to simulate analog circuits with FinFET Technology. A Miller operational Amplifier was simulated in SPICE simulator and the results were validated comparing them with experimental data published in previous works. © 2012 IEEE.
An analytical estimation model for the spreading resistance of Double-Gate FinFETs
(2012-03-17) MALHEIRO, C. T.; PEREIRA, A. S. N.; Renato Giacomini
The FinFET spreading resistance is the component of the parasitic resistance of FinFETs caused by the curved shape of the current lines in drain and source regions, close to the junctions. This work proposes a very simple analytical model for the spreading resistance of Double-Gate FinFETs that is valid for any fin width from 16nm, without fitting parameters. The model output was compared to data extracted from numeric simulation and it showed accuracy better than 8% for the considered range of devices with three different doping concentrations. © 2012 IEEE.