Advantages of the graded-channel SOI FD MOSFET for application as a quasi-linear resistor
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48
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Artigo
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2005
Autores
Cerdeira A.
Aleman M.A.
Pavanello M.A.
Martino J.A.
Vancaillie L.
Flandre D.
Aleman M.A.
Pavanello M.A.
Martino J.A.
Vancaillie L.
Flandre D.
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IEEE Transactions on Electron Devices
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CERDEIRA, Antonio; ALEMÁN, Miguel; PAVANELLO, Marcelo A.; MARTINO, João Antonio; VANCAILLIE, Laurent; FLANDRE, Denis. Advantages of the Graded-Channel SOI FD MOSFET for Application as a Quasi-Linear Resistor. I.E.E.E. Transactions on Electron Devices, v. 52, n. 5, p. 967-972, 2005.
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In this paper, we analyze the previously unexpected advantages of asymmetric channel engineering on the MOS resistance behavior in quasi-linear operation, such as used in integrated continuous-time tunable filters. The study of the two major figures of merit in such applications as on-resistance and nonlinear harmonic distortion, is supported by both measurements and simulations of conventional and graded-channel (GC) fully depleted silicon-on-insultor (SOI) MOSFETs. The quasi-linear current-voltage characteristics of GC transistors show a decrease of the on-resistance as the length of the low doped region in the channel is increased, as well as an improvement in the third-order harmonic distortion (HD3), when compared with conventional transistors. A method for full comparison between conventional and GC SOI MOSFETs is presented, considering HD3 evolution with on-resistance tuning under low voltage of operation. Results demonstrate the significant advantages provided by the asymmetrical long channel transistors. © 2005 IEEE.