Please use this identifier to cite or link to this item: https://repositorio.fei.edu.br/handle/FEI/1065
Title: High performance analog operation of double gate transistors with the graded-channel architecture at low temperatures
Authors: PAVANELLO, Marcelo A.
MARTINO, João Antonio
RASKIN, Jean Pierre
FLANDRE, Denis
Issue Date: 2005
Journal: Solid-State Electronics
ISSN: 0038-1101
Citation: PAVANELLO, Marcelo A.; MARTINO, João Antonio; RASKIN, Jean Pierre; FLANDRE, Denis. High performance analog operation of double gate transistors with the graded-channel architecture at low temperatures. Solid-State Electronics, v. 49, n. 10, p. 1569-1575, 2005.
Access Type: Acesso Aberto
DOI: 10.1016/j.sse.2005.08.005
URI: https://repositorio.fei.edu.br/handle/FEI/1065
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