Please use this identifier to cite or link to this item: https://repositorio.fei.edu.br/handle/FEI/1135
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dc.contributor.authorCARDOSO PAZ, BRUNA
dc.contributor.authorCASSÉ, MIKAËL
dc.contributor.authorBARRAUD, SYLVAIN
dc.contributor.authorREIMBOLD, GILLES
dc.contributor.authorVINET, MAUD
dc.contributor.authorFAYNOT, OLIVIER
dc.contributor.authorANTONIO PAVANELLO, MARCELO
dc.date.accessioned2019-08-19T23:45:13Z-
dc.date.available2019-08-19T23:45:13Z-
dc.date.issued2018
dc.identifier.citationCARDOSO PAZ, BRUNA; CASSÉ, MIKAËL; BARRAUD, SYLVAIN; REIMBOLD, GILLES; VINET, MAUD; FAYNOT, OLIVIER; ANTONIO PAVANELLO, MARCELO. Methodology to Separate Channel Conductions of Two Level Vertically Stacked SOI Nanowire MOSFETs. SOLID-STATE ELECTRONICS, v. 149, n. 11, p. 62-70, 2018.
dc.identifier.issn0038-1101
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1135-
dc.relation.ispartofSOLID-STATE ELECTRONICS
dc.rightsAcesso Aberto
dc.titleMethodology to Separate Channel Conductions of Two Level Vertically Stacked SOI Nanowire MOSFETspt_BR
dc.typeArtigopt_BR
dc.identifier.doi10.1016/j.sse.2018.08.012
dc.description.volume149
dc.description.issuenumber11
dc.description.firstpage62
dc.description.lastpage70
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