Improving MOSFETs' TID Tolerance Through Diamond Layout Style

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Artigo
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2017
Autores
Seixas L.E.
Goncalez O.L.
Souza R.
Finco S.
Vaz R.G.
Da Silva G.A.
Gimenez S.P.
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IEEE Transactions on Device and Materials Reliability
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Luis Eduardo Seixas; GONCALVEZ, O. L.; SOUZA, R.; FINCO, SAULO; G., V. R.; Gabriel Augusto da Silva; GIMENEZ, S. P.. Improving MOSFETs TID Tolerance through Diamond Layout Style. IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, v. 1, n. 1, p. 1-1, 2017.
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© 2001-2011 IEEE.This letter describes an experimental comparative study of the total ionizing dose (TID) effects due to Co-60 gamma irradiation between hexagonal (Diamond) and conventional rectangular gates metal-oxide semiconductor field-effect transistors (MOSFETs), regarding the same bias conditions during irradiation. The transistors were manufactured by using the 350 nm commercial bulk complementary metal-oxide semiconductor (CMOS) integrated-circuits (ICs) technology. The innovative hexagonal gate layout proposal can reduce the parameter deviations of TID effects in MOSFETs in, approximately, 30%, 400%, and 100% in terms of the threshold voltage, leakage drain current, and subthreshold slope, respectively, regarding the standard MOSFET counterparts. Therefore, the Diamond MOSFET can be considered as a low-cost alternative device to be used in space CMOS ICs applications.

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