Diamond layout style impact on SOI MOSFET in high temperature environment

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22
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2015
Autores
Gimenez S.P.
Galembeck E.H.S.
Renaux C.
Flandre D.
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Periódico
Microelectronics Reliability
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Gimenez, Salvador Pinillos; GALEMBECK, EGON HENRIQUE SALERNO; RENAUX, CHRISTIAN; FLANDRE, Denis. Diamond layout style impact on SOI MOSFET in high temperature environment. Microelectronics and Reliability, v. 55, n. 5, p. 783/MR11492-788, 2015.
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© 2015 Elsevier Ltd.This work performs an experimental comparative study between the Diamond (hexagonal gate geometry) and Standard layouts styles for Metal-Oxide-Semiconductor Field Effect Transistor in high temperatures environment. The devices were manufactured with the 1 μm Silicon-on-Insulator CMOS technology. The results demonstrate that the Diamond SOI MOSFET is capable to keep active the Longitudinal Corner Effect and the Parallel Association of MOSFET with Different Channel Lengths Effect in high temperature conditions and consequently to continue presenting a better electrical performance than the one found in the conventional SOI MOSFET.

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