Please use this identifier to cite or link to this item: https://repositorio.fei.edu.br/handle/FEI/1468
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dc.contributor.authorTAMBARA, LUCAS ANTUNES
dc.contributor.authorTONFAT, JORGE
dc.contributor.authorSANTOS, ANDRE
dc.contributor.authorLIMA KASTENSMIDT, FERNANDA
dc.contributor.authorMEDINA, NILBERTO H.
dc.contributor.authorADDED, NEMITALA
dc.contributor.authorAGUIAR, VITOR A. P.
dc.contributor.authorAGUIRRE, FERNANDO
dc.contributor.authorSILVEIRA, MARCILEI A. G.
dc.date.accessioned2019-08-19T23:47:20Z-
dc.date.available2019-08-19T23:47:20Z-
dc.date.issued2017
dc.identifier.citationTAMBARA, LUCAS ANTUNES; TONFAT, JORGE; SANTOS, ANDRE; LIMA KASTENSMIDT, FERNANDA; MEDINA, NILBERTO H.; ADDED, NEMITALA; AGUIAR, VITOR A. P.; AGUIRRE, FERNANDO; SILVEIRA, MARCILEI A. G.. Analyzing Reliability and Performance Trade-offs of HLS-based Designs in SRAM-based FPGAs under Soft Errors. IEEE Transactions on Nuclear Science, v. 63, p. 1-1, 2017.
dc.identifier.issn0018-9499
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1468-
dc.relation.ispartofIEEE Transactions on Nuclear Science
dc.rightsAcesso Aberto
dc.titleAnalyzing Reliability and Performance Trade-offs of HLS-based Designs in SRAM-based FPGAs under Soft Errorspt_BR
dc.typeArtigopt_BR
dc.identifier.doi10.1109/TNS.2017.2648978
dc.description.volume63
dc.description.firstpage1
dc.description.lastpage1
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