Simulação analítica de espelhos de corrente utilizando associação série do transistores SOI MOSFET
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Tipo de produção
Dissertação
Data
2020
Autores
Silva, Paulo Rodrigues da
Orientador
Souza, Michelly de.
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Citação
SILVA, Paulo Rodrigues da. Simulação analítica de espelhos de corrente utilizando associação série do transistores SOI MOSFET. 2020. 135 f. Dissertação (Mestrado em Engenharia Elétrica) - Centro Universitário FEI, São Bernardo do Campo, 2020. Disponível em: https://doi.org/10.31414/EE.2020.D.131163.
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Palavras-chave
Transistor de efeito de campo de metal-óxido semicondutor,Circuitos analógicos
Resumo
Este trabalho apresenta uma análise das vantagens da utilização de associação série simétrica (S-SC) e assimétrica (A-SC) de SOI nMOSFETs em relação ao transistor SOI MOSFET isolado (ST) em blocos analógicos básicos. Além de apresentar as características do
amplificador com um único transistor, são estudados espelhos de corrente com diferentes arquiteturas. O estudo e avaliação dos resultados destes blocos analógicos básicos foram realizados através das características elétricas obtidas a partir de simulações de circuitos do tipo SPICE, utilizando o programa ICAP/4. Inicialmente, os parâmetros do modelo foram ajustados com o propósito de obter características dos dispositivos simulados semelhantes às
características dos dispositivos caracterizados experimentalmente. Após os ajustes iniciais, foram simuladas as associações séries simétricas (S-SC – Symmetric Self-Cascode, associação de dois transistores com tensões de limiar idênticas) e associações séries assimétricas (A-SC –Asymmetric Self-Casode, associação de dois transistores com tensões de limiar diferentes) de SOI nMOSFETs. São apresentadas as características de corrente do dreno (IDS), transcondutância (gm), condutância de saída (gD), Tensão Early (VEA), ganho de tensão de malha aberta e relação gm/IDS em função das tensões aplicadas aos terminais dos dispositivos isolados
e compostos (associações simétricas e assimétricas) com diferentes dimensões. Em seguida, as associações séries e os transistores isolados (ST – Single Transistor) foram utilizados na simulação de espelhos de corrente na configuração fonte comum e o transistor isolado com as arquiteturas Cascode e Wilson, a fim de verificar o desempenho da estrutura composta. Foi verificado que os espelhos de corrente utilizando a associação S-SC apresentaram um
comportamento semelhante ao dos espelhos de corrente formados por SOI MOSFET ST, com o mesmo comprimento de canal. Comprovou-se que a associação A-SC possui um melhor desempenho elétrico em relação à associação S-SC e o ST em espelho de corrente fonte comum, como também, em relação às arquiteturas Cascode e Wilson usando transistor isolado, nas regiões de inversão fraca e moderada, devido à menor condutância de saída e, consequentemente, maior tensão Early
This work presents an analysis of the advantages of symmetric (S-SC) and asymmetric (A-SC) self-cascode associations of nMOSFETs in relation to a single transistor (ST) SOI MOSFET by means of analytical simulations of basic analog blocks. Besides presenting the characteristics of a single transistor amplifier, current mirrors with different architectures are studied. The study and evaluation of these analog blocks were performed based on electricals characteristics obtained from SPICE circuits simulations, using ICAP/4 software. Initially, model parameters were adjusted to fit experimental data, to ensure simulated devices characteristics similar to the real ones. After these adjustments, symmetric self-cascode (association of two transistors with identical threshold voltages) and asymmetric self-cascode (association of two transistors with different threshold voltages) of SOI nMOSFETs were simulated at device level. Electrical parameters such as drain current (IDS), transconductance (gm), output conductance (gD), Early voltage (VEA), open loop gain voltage and gm/IDS ratio are presented as a function of the voltage applied to single transistor terminals and composite device (symmetric and asymmetric associations) with different dimensions. Then, the series associations and the single transistors (ST) were used in current mirrors circuits in CommonSource and single transistor in Cascode and Wilson architectures to verify the composed structure performance. It has been verified that current mirror using association S-SC present electrical behavior similar to the current mirror formed by SOI MOSFET ST, with the same channel length. It has been observed that the association A-SC features better electric performance in relation to the S-SC and ST in common-source current mirror, as well, in relation to Cascode and Wilson architectures using single transistors, in week and moderate inversion regions, due to the better output conductance and, consequently, the higher Early voltage
This work presents an analysis of the advantages of symmetric (S-SC) and asymmetric (A-SC) self-cascode associations of nMOSFETs in relation to a single transistor (ST) SOI MOSFET by means of analytical simulations of basic analog blocks. Besides presenting the characteristics of a single transistor amplifier, current mirrors with different architectures are studied. The study and evaluation of these analog blocks were performed based on electricals characteristics obtained from SPICE circuits simulations, using ICAP/4 software. Initially, model parameters were adjusted to fit experimental data, to ensure simulated devices characteristics similar to the real ones. After these adjustments, symmetric self-cascode (association of two transistors with identical threshold voltages) and asymmetric self-cascode (association of two transistors with different threshold voltages) of SOI nMOSFETs were simulated at device level. Electrical parameters such as drain current (IDS), transconductance (gm), output conductance (gD), Early voltage (VEA), open loop gain voltage and gm/IDS ratio are presented as a function of the voltage applied to single transistor terminals and composite device (symmetric and asymmetric associations) with different dimensions. Then, the series associations and the single transistors (ST) were used in current mirrors circuits in CommonSource and single transistor in Cascode and Wilson architectures to verify the composed structure performance. It has been verified that current mirror using association S-SC present electrical behavior similar to the current mirror formed by SOI MOSFET ST, with the same channel length. It has been observed that the association A-SC features better electric performance in relation to the S-SC and ST in common-source current mirror, as well, in relation to Cascode and Wilson architectures using single transistors, in week and moderate inversion regions, due to the better output conductance and, consequently, the higher Early voltage