Please use this identifier to cite or link to this item: https://repositorio.fei.edu.br/handle/FEI/3478
Title: Substrate Effect Evaluation by the Analysis of Intrinsic Capacitances in SOI UTBB Transistors
Authors: COSTA, F. J.
DORIA, R. T.
Rodrigo Trevisoli Doria
Issue Date: 26-May-2020
Abstract: The main goal of this paper is to present the behavior of the substrate effect in Ultra-Thin Body and Buried Oxide (UTBB) SOI MOSFETs with respect to the back gate bias (VSUB) through DC and AC simulations validated to experimental data. Different ground plane (GP) arrangements have been considered in order to enhance the analysis. It has been shown that the substrate effect is strongly influenced by the reduction of the back gate bias and, that the capacitive coupling of the structure presents a different behavior with respect of each kind of GP configuration as the back gate bias is varied. Finally, it has been shown that the GP below the source and drain regions contributes significantly to the overall capacitive coupling of the transistors.
Keywords: UTBB
Substrate Effect
Body Factor
Journal: JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGUÊS)
ISSN: 1872-0234
Citation: COSTA, F. J.; TREVISOLI, R.; DORIA, R. T.. Substrate effect evaluation by the Analysis of Intrinsic capacitances in SOI UTBB Transistors. JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGUÊS), v. 15, n. 1, p. 1-6, 2020.
Access Type: Acesso Aberto
DOI: 10.29292/jics.v15i1.118
URI: https://repositorio.fei.edu.br/handle/FEI/3478
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