Substrate Effect Evaluation by the Analysis of Intrinsic Capacitances in SOI UTBB Transistors
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2
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Artigo
Data
2020-05-26
Autores
COSTA, F. J.
DORIA, R. T.
Rodrigo Trevisoli Doria
DORIA, R. T.
Rodrigo Trevisoli Doria
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Periódico
JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGUÊS)
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Citação
COSTA, F. J.; TREVISOLI, R.; DORIA, R. T.. Substrate effect evaluation by the Analysis of Intrinsic capacitances in SOI UTBB Transistors. JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGUÊS), v. 15, n. 1, p. 1-6, 2020.
Texto completo (DOI)
Palavras-chave
UTBB,Substrate Effect,Body Factor
Resumo
The main goal of this paper is to present the behavior of the substrate effect in Ultra-Thin Body and Buried Oxide (UTBB) SOI MOSFETs with respect to the back gate bias (VSUB) through DC and AC simulations validated to experimental data. Different ground plane (GP) arrangements have been considered in order to enhance the analysis. It has been shown that the substrate effect is strongly influenced by the reduction of the back gate bias and, that the capacitive coupling of the structure presents a different behavior with respect of each kind of GP configuration as the back gate bias is varied. Finally, it has been shown that the GP below the source and drain regions contributes significantly to the overall capacitive coupling of the transistors.