Improved analog operation of junctionless nanowire transistors using back bias
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2015-03-18
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TREVISOLI, R.
Rodrido Doria
Michelly De Souza
Marcelo Antonio Pavanello
Rodrido Doria
Michelly De Souza
Marcelo Antonio Pavanello
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EUROSOI-ULIS 2015 - 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon
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TREVISOLI, R.; DORIA, R.; DE SOUZA, M. PAVANELLO, M. A. Improved analog operation of junctionless nanowire transistors using back bias. EUROSOI-ULIS 2015 - 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, p. 265-268. March, 2015.
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This work reports, for the first time, an analysis of substrate bias on the analog parameters of Junctionless Nanowire Transistors operating as single transistor amplifiers through experimental and simulated data. The study is performed in terms of output conductance, transconductance, open loop voltage gain and transconductance to the drain current ratio. It has been shown that the substrate bias can affect significantly the performance of junctionless devices, such that the positive back bias can reduce the output conductance and improve the voltage gain.