Experimental Assessment of Variability in Junctionless Nanowire nMOS Transistors
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5
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Data
2021-09-06
Autores
Michelly De Souza
BARRAUD, S.
CASSE, M.
VINET, M.
FAYNOR, O.
Marcelo Antonio Pavanello
BARRAUD, S.
CASSE, M.
VINET, M.
FAYNOR, O.
Marcelo Antonio Pavanello
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Periódico
European Solid-State Device Research Conference
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DE SOUZA, M.; BARRAUD, S.; CASSE, M.; VINET, M.; FAYNOR, O.; PAVANELLO, M. A. Experimental assessment of variability in junctionless nanowire nMOS transistors. p. 223-226, 2021.
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In this work, experimental assessment of the variability of threshold voltage and drain current in junctionless nanowire n MOS transistors is presented. Die-to-die variability of threshold voltage and drain current is presented and compared to inversion mode nanowire with the same dimensions. Although the junctionless nanowires have shown larger threshold voltage matching coefficients than inversion mode devices, the variability obtained experimentally has shown to be smaller than predicted by some simulations reported in the literature. Also, it has been shown that as the channel length of junctionless nanowire transistors is reduced, the current variability becomes smaller than in inversion mode nanowires, at the same current level and dimensions.