Threshold voltage in junctionless nanowire transistors

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dc.contributor.authorTrevisoli R.D.
dc.contributor.authorDoria R.T.
dc.contributor.authorDe Souza M.
dc.contributor.authorPavanello M.A.
dc.date.accessioned2019-08-19T23:45:10Z
dc.date.available2019-08-19T23:45:10Z
dc.date.issued2011
dc.description.abstractThis work presents a physically based analytical model for the threshold voltage in junctionless nanowire transistors (JNTs). The model is based on the solution of the two-dimensional Poisson equation and includes the dependence on JNT width, height and doping concentration. The quantum confinement has also been taken into consideration in the model formulation. The model is validated using experimental results of nMOS and pMOS JNTs, and three-dimensional TCAD simulations where the nanowire width and height, doping concentration, gate oxide thickness and temperature have been varied. The gate oxide capacitance is also addressed aiming to adequately calculate the capacitance in non-planar devices. The temperature influence on the threshold voltage of JNTs is also analyzed. The presented model shows excellent agreement with both experimental and simulated data, adequately describing the JNT threshold voltage. © 2011 IOP Publishing Ltd.
dc.description.firstpage105009
dc.description.issuenumber10
dc.description.volume26
dc.identifier.citationTREVISOLI, Renan Doria; DORIA, Rodrigo Trevisoli; DE SOUZA, Michelly; PAVANELLO, Marcelo A.; Pavanello, Marcelo Antonio. Threshold voltage in junctionless nanowire transistors. Semiconductor Science and Technology (Print), v. 26, p. 105009, 2011.
dc.identifier.doi10.1088/0268-1242/26/10/105009
dc.identifier.issn0268-1242
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1091
dc.relation.ispartofSemiconductor Science and Technology
dc.rightsAcesso Restrito
dc.titleThreshold voltage in junctionless nanowire transistors
dc.typeArtigo
fei.scopus.citations115
fei.scopus.eid2-s2.0-80053380841
fei.scopus.subjectAnalytical model
fei.scopus.subjectDoping concentration
fei.scopus.subjectGate oxide capacitance
fei.scopus.subjectGate oxide thickness
fei.scopus.subjectModel formulation
fei.scopus.subjectNanowire transistors
fei.scopus.subjectNon-planar devices
fei.scopus.subjectPhysically based
fei.scopus.subjectSimulated data
fei.scopus.subjectTCAD simulation
fei.scopus.subjectTemperature influence
fei.scopus.updated2024-12-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=80053380841&origin=inward
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