Performance and Analysis of n-Type Vertically Stacked Nanowires Regarding Harmonic Distortion

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dc.contributor.authorCARVALHO, CESAR AUGUSTO BELCHIOR
dc.contributor.authorSILVA, GENARO MARINIELLO DA
dc.contributor.authorPAZ, BRUNA CARDOSO
dc.contributor.authorBARRAUD, SYLVAIN
dc.contributor.authorVINET, MAUD
dc.contributor.authorFAYNOT, OLIVIER
dc.contributor.authorMarcelo Antonio Pavanello
dc.contributor.authorOrcidhttps://orcid.org/0000-0003-1361-3650
dc.date.accessioned2021-11-09T18:02:41Z
dc.date.available2021-11-09T18:02:41Z
dc.date.issued2020-08-11
dc.description.abstractThispaperstudies theharmonic distortion (or non-linearity) of vertically stacked SOI nanowireswith differ-ent fin widths and channel lengths. The total harmonic distor-tion and third order harmonic distortion areused as figuresof meritin this work. The harmonicdistortion analysis is per-formed taking in consideration the differences between transis-tor’s intrinsic voltage gain and transconductance over drain current ratio.
dc.description.firstpage1
dc.description.lastpage5
dc.description.volume15
dc.identifier.citationCARVALHO, C. A. B.; MARINIELLO, G.; PAZ, B. C.; BARRAUD, S.; VINET, M.; FAYNOT, O.; PAVANELLO, M. A. Performance and analysis of n-Type vertically stacked nanowires regarding harmonic distortion. JICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGUÊS), v. 15, p. 1-5, 2020.
dc.identifier.doi10.29292/jics.v15i2.202
dc.identifier.issn1872-0234
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/3452
dc.relation.ispartofJICS. JOURNAL OF INTEGRATED CIRCUITS AND SYSTEMS (ED. PORTUGUÊS)
dc.rightsAcesso Aberto
dc.subjectstacked nanowires
dc.subjectharmonic distortion
dc.subjectMOSFET
dc.subjectSOI transistor
dc.titlePerformance and Analysis of n-Type Vertically Stacked Nanowires Regarding Harmonic Distortionpt_BR
dc.typeArtigopt_BR
fei.scopus.citations0
fei.scopus.eid2-s2.0-85090611202
fei.scopus.updated2024-12-01
fei.source.urlhttps://jics.org.br/ojs/index.php/JICS/article/view/202
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