Reliability on ARM Processors Against Soft Errors Through SIHFT Techniques

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dc.contributor.authorChielle E.
dc.contributor.authorRosa F.
dc.contributor.authorRodrigues G.S.
dc.contributor.authorTambara L.A.
dc.contributor.authorTonfat J.
dc.contributor.authorMacchione E.
dc.contributor.authorAguirre F.
dc.contributor.authorAdded N.
dc.contributor.authorMedina N.
dc.contributor.authorAguiar V.
dc.contributor.authorSilveira M.A.G.
dc.contributor.authorOst L.
dc.contributor.authorReis R.
dc.contributor.authorCuenca-Asensi S.
dc.contributor.authorKastensmidt F.L.
dc.date.accessioned2019-08-19T23:47:19Z
dc.date.available2019-08-19T23:47:19Z
dc.date.issued2016
dc.description.abstract© 1963-2012 IEEE.ARM processors are leaders in embedded systems, delivering high-performance computing, power efficiency, and reduced cost. For this reason, there is a relevant interest for its use in the aerospace industry. However, the use of sub-micron technologies has increased the sensitivity to radiation-induced transient faults. Thus, the mitigation of soft errors has become a major concern. Software-Implemented Hardware Fault Tolerance (SIHFT) techniques are a low-cost way to protect processors against soft errors. On the other hand, they cause high overheads in the execution time and memory, which consequently increase the energy consumption. In this work, we implement a set of software techniques based on different redundancy and checking rules. Furthermore, a low-overhead technique to protect the program execution flow is included. Tests are performed using the ARM Cortex-A9 processor. Simulated fault injection campaigns and radiation test with heavy ions have been performed. Results evaluate the trade-offs among fault detection, execution time, and memory footprint. They show significant improvements of the overheads when compared to previously reported techniques.
dc.description.firstpage2208
dc.description.issuenumber4
dc.description.lastpage2216
dc.description.volume63
dc.identifier.citationCHIELLE, EDUARDO; AGUIAR, VITOR; SILVEIRA, MARCILEI A. G.; OST, LUCIANO; REIS, RICARDO; CUENCA-ASENSI, SERGIO; KASTENSMIDT, FERNANDA L.; ROSA, FELIPE; RODRIGUES, GENNARO S.; TAMBARA, LUCAS A.; TONFAT, JORGE; MACCHIONE, EDUARDO; AGUIRRE, FERNANDO; ADDED, NEMITALA; MEDINA, NILBERTO. Reliability on ARM Processors Against Soft Errors Through SIHFT Techniques. IEEE Transactions on Nuclear Science, v. 63, n. 4, p. 1-9, 2016.
dc.identifier.doi10.1109/TNS.2016.2525735
dc.identifier.issn0018-9499
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1466
dc.relation.ispartofIEEE Transactions on Nuclear Science
dc.rightsAcesso Restrito
dc.subject.otherlanguageAerospace applications
dc.subject.otherlanguageerror detection
dc.subject.otherlanguagefault coverage
dc.subject.otherlanguagefault tolerance
dc.subject.otherlanguagemitigation techniques
dc.subject.otherlanguageprocessors
dc.subject.otherlanguagereliability
dc.subject.otherlanguagesoft errors
dc.subject.otherlanguagesoftware techniques
dc.titleReliability on ARM Processors Against Soft Errors Through SIHFT Techniques
dc.typeArtigo
fei.scopus.citations28
fei.scopus.eid2-s2.0-84978286105
fei.scopus.subjectHigh performance computing
fei.scopus.subjectMemory footprint
fei.scopus.subjectProgram execution
fei.scopus.subjectRadiation-induced
fei.scopus.subjectSoftware implemented hardware fault tolerance
fei.scopus.subjectSoftware techniques
fei.scopus.subjectSubmicron technologies
fei.scopus.subjectTransient faults
fei.scopus.updated2024-05-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84978286105&origin=inward
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