Analog characteristics of n-type vertically stacked nanowires

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dc.contributor.authorMARINIELLO, G.
dc.contributor.authorCARVALHO, C. A. B. D.
dc.contributor.authorCARDOSO, PAZ, B.
dc.contributor.authorBARRAUD, S.
dc.contributor.authorVINET, M.
dc.contributor.authorFAYNOT, O.
dc.contributor.authorMarcelo Antonio Pavanello
dc.date.accessioned2022-01-12T21:53:32Z
dc.date.available2022-01-12T21:53:32Z
dc.date.issued2021
dc.description.abstract© 2021This paper presents the fundamental analog figures of merit, such as the transconductance, output conductance, transconductance over drain current ratio, intrinsic voltage gain and harmonic distortion (or non-linearity), of n-type vertically stacked nanowires with variable fin width and channel length. To have a physical insight on the results, the basic electrical parameters such as threshold voltage, subthreshold slope and low field electron mobility of the analyzed transistors were also studied. The studied analog parameters are presented in function of the transconductance over drain current, to allow for the comparison at the same inversion level.
dc.description.volume185
dc.identifier.citationMARINIELLO, G.; CARVALHO, C. A. B. D.; CARDOSO, PAZ, B.; BARRAUD, S.; VINET, M.; FAYNOT, O.; PAVANNELO, M. A. Analog characteristics of n-type vertically stacked nanowires. Solid-State Electronics, v. 185, nov. 2021.
dc.identifier.doi10.1016/j.sse.2021.108127
dc.identifier.issn0038-1101
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/3548
dc.relation.ispartofSolid-State Electronics
dc.rightsAcesso Restrito
dc.subject.otherlanguageAnalog
dc.subject.otherlanguageHarmonic distortion
dc.subject.otherlanguageMOSFET
dc.subject.otherlanguageNanowire
dc.subject.otherlanguageStacked
dc.titleAnalog characteristics of n-type vertically stacked nanowires
dc.typeArtigo
fei.scopus.citations2
fei.scopus.eid2-s2.0-85108279299
fei.scopus.subjectAnalog figures of merits
fei.scopus.subjectAnalog parameters
fei.scopus.subjectChannel length
fei.scopus.subjectElectrical parameter
fei.scopus.subjectIntrinsic voltage gains
fei.scopus.subjectInversion levels
fei.scopus.subjectOutput conductance
fei.scopus.subjectSubthreshold slope
fei.scopus.updated2024-07-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85108279299&origin=inward
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