Impact of substrate bias on the mobility of n-type-gate SOI nanowire MOSFETs
Nenhuma Miniatura disponível
Citações na Scopus
4
Tipo de produção
Artigo de evento
Data
2019-08-05
Autores
BERGAMASHI, F. E.
BARRAUD, S.
CASSE, M.
VINET, M.
FAYNOT, O.
PAZ, B. C.
Marcelo Antonio Pavanello
BARRAUD, S.
CASSE, M.
VINET, M.
FAYNOT, O.
PAZ, B. C.
Marcelo Antonio Pavanello
Orientador
Periódico
SBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices
Título da Revista
ISSN da Revista
Título de Volume
Citação
BERGAMASHI, F. E.; BARRAUD, S.; CASSE, M.; VINET, M.; FAYNOT, O.; PAZ, B. C.; PAVANELLO, M. A. Impact of substrate bias on the mobility of n-type-gate SOI nanowire MOSFETs. SBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices, Aug. 2019.
Texto completo (DOI)
Palavras-chave
Resumo
This work presents the impact of substrate bias on the mobility of high-κ gate n-type Ω-gate SOI nanowire MOS transistors. The analysis is performed through experimental measurements and tridimensional numerical simulations. Mobility and its degradation coefficients are extracted using the Y-function method. The results showed that back bias increase has a beneficial effect on mobility for negative voltages and up to 10V, due to reduction in surface roughness scattering. But for higher back bias levels, mobility starts undergoing severe degradation. Simulations show that strong positive back bias drags the inversion layer down to the second interface, where mobility is shown to be lower.