Compact Analytical Model for Trap-Related Low Frequency Noise in Junctionless Transistors
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4
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2019-09-26
Autores
TREVISOLI, R.
Rodrigo Doria
BARRAUD, S.
Marcelo Antonio Pavanello
Rodrigo Doria
BARRAUD, S.
Marcelo Antonio Pavanello
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European Solid-State Device Research Conference
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TREVISOLI, R.; DORIA, R.; BARRAUD, S.; PAVANELLO, M. A. Compact Analytical Model for Trap-Related Low Frequency Noise in Junctionless Transistors. European Solid-State Device Research Conference, p. 194-197, Sept. 2019.
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The aim of this work is to propose a compact analytical model for the Low Frequency Noise (LFN) in Junctionless Nanowire Transistors (JNTs). Since JNTs work differently from inversion mode transistors, the noise is also expected to behave differently. To the best of our knowledge, no analytical models have been presented for LFN in these devices. The proposed model is validated through numerical simulations. Experimental results are also used to demonstrate its applicability.