Back bias influence on analog performance of pTFET

Nenhuma Miniatura disponível
Citações na Scopus
3
Tipo de produção
Artigo de evento
Data
2013-10-10
Autores
AGOPIAN, P. G. D.
NEVES, F. S.
MARTINO, J. A.
VANDOOREN, A.
ROOYACKERS, R.
SIMOEN, E.
CLAEYS, C.
Orientador
Periódico
2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2013
Título da Revista
ISSN da Revista
Título de Volume
Citação
AGOPIAN, P. G. D.; NEVES, F. S.; MARTINO, J. A.; VANDOOREN, A.; ROOYACKERS, R.; SIMOEN, E.; CLAEYS, C. Back bias influence on analog performance of pTFET. 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2013, Oct. 2013.
Texto completo (DOI)
Palavras-chave
Resumo
In this work the back bias influence on the analog performance of tunnel-FETs is evaluated experimentally for the first time. The analysis of the transconductance, output conductance and intrinsic voltage gain (Av) was performed by comparing the pTFET behavior with a well-known pFinFET that was fabricated using the same process flow. Numerical simulations were also performed in order to explain the pTFET behavior. Although the pTFET shows to be more susceptible to the back bias condition, it also shows to present always a better Av for all bias conditions. The best result in both devices was obtained when the back bias is near 0 V and the Av difference is around 30 dB in favor of pTFET. © 2013 IEEE.

Coleções