Evaluation of the channel engineering impact on the analog performance of deep-submicrometer partially depleted SOI MOSFETS at low temperatures
dc.contributor.advisorOrcid | https://orcid.org/0000-0003-1361-3650 | |
dc.contributor.author | Marcelo Antonio Pavanello | |
dc.contributor.author | MARTINO, J. A. | |
dc.contributor.author | SIMOEN, E. | |
dc.contributor.author | CLAEYS, C. | |
dc.date.accessioned | 2023-08-26T23:50:51Z | |
dc.date.available | 2023-08-26T23:50:51Z | |
dc.date.issued | 2004-09-11 | |
dc.description.abstract | The use of partially depleted deep-submicrometer SOI nMOSFETs in mixed mode applications is discussed in terms of channel engineering and temperature of operation. It is shown that the halo implantation used to obtain better digital characteristics degrades the gain and the unity gain frequency in comparison to devices that are not subjected to this implantation. | |
dc.description.firstpage | 21 | |
dc.description.lastpage | 26 | |
dc.description.volume | 3 | |
dc.identifier.citation | PAVANELLO, M. A.; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C. Evaluation of the channel engineering impact on the analog performance of deep-submicrometer partially depleted SOI MOSFETS at low temperatures. Proceedings - Electrochemical Society, v. 3, p. 21-26, sept. 2023. | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/5061 | |
dc.relation.ispartof | Proceedings - Electrochemical Society | |
dc.rights | Acesso Restrito | |
dc.title | Evaluation of the channel engineering impact on the analog performance of deep-submicrometer partially depleted SOI MOSFETS at low temperatures | |
dc.type | Artigo de evento | |
fei.scopus.citations | 1 | |
fei.scopus.eid | 2-s2.0-17044433879 | |
fei.scopus.subject | Channel engineering | |
fei.scopus.subject | High-frequency systems | |
fei.scopus.subject | Linearity | |
fei.scopus.subject | Scaling problems | |
fei.scopus.updated | 2024-07-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=17044433879&origin=inward |