Performance of Stacked SOI Nanowires in a Wide Temperature Range
Nenhuma Miniatura disponível
Citações na Scopus
0
Tipo de produção
Artigo de evento
Data
2021-09-01
Autores
RODRIGUES, J.C.
MARINIELLO, G.
CASSE, M.
BARRAUD, S.
VINET, M.
FAYNOT, O.
Marcelo Antonio Pavanello
MARINIELLO, G.
CASSE, M.
BARRAUD, S.
VINET, M.
FAYNOT, O.
Marcelo Antonio Pavanello
Orientador
Periódico
2021 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EuroSOI-ULIS 2021
Título da Revista
ISSN da Revista
Título de Volume
Citação
RODRIGUES, J.C.; MARINIELLO, G.; CASSE, M.; BARRAUD, S.; VINET, M.; FAYNOT, O.; PAVANELLO, M. A. Performance of stacked SOI nanowires in a wide temperature range. 2021 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EuroSOI-ULIS 2021, p. 1-4, sept. 2021.
Texto completo (DOI)
Palavras-chave
Resumo
This paper investigates the basic electrical characteristics and some analog figures of merit for 2-level vertically stacked nanowire MOSFETs with different fin widths in the temperature range of 93K up to 400 K. Basic electrical parameters such as threshold voltage, subthreshold slope and carrier mobility are evaluated in linear region. On the other hand, analog figures of merit as transconductance, output conductance and voltage gain are evaluated in saturation.