Methodology to optimize and reduce the total gate area of robust operational transconductance amplifiers by using diamond layout style for MOSFETs

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dc.contributor.authorBANIN JUNIO, J. R. BANIN JUNIO, J. R.; MORETO R. A. L.; DA SILVA, G. A.; THOMAZ, C. E.; GIMENEZ, S. Methodology to optimize and reduce the total gate area of robust operational transconductance amplifiers by using diamond layout style for MOSFETs. Analog Integrated Circuits and Signal Processing, v. 106, n. 1, p. 293-306, Jan. 2021.
dc.contributor.authorMORETO R. A. L.
dc.contributor.authorDA SILVA, G. A.
dc.contributor.authorTHOMAZ, C. E.
dc.contributor.authorSalvador Gimenez
dc.date.accessioned2022-01-12T21:54:38Z
dc.date.available2022-01-12T21:54:38Z
dc.date.issued2021-01-05
dc.description.abstract© 2020, Springer Science+Business Media, LLC, part of Springer Nature.This paper describes a pioneering methodology to design, optimize, and reduce the total gate area of robust Operational Transconductance Amplifiers (OTAs). The Single-Ended Single-Stage (SESS) OTA has been chosen to validate the proposed technique by using the 180 nm planar Complementary Metal-Oxide-Semiconductor (CMOS) Integrated Circuits (ICs) technology. The Electronic Design Automationtool, named iMTGSPICE, was used to design and optimize the SESS OTA. There are several heuristics optimization techniques of Artificial Intelligence to optimize analog and radio-frequency CMOS ICs, but we have selected to use the Genetic Algorithm because it presents the best optimization performance among the other algorithms previously studied. This paper also describes a procedure of converting the Conventional planar MOSFETs (rectangular gate shape) into the Diamond MOSFETs (hexagonal gate shape) with the same electrical performance. Furthermore, it is proposed a procedure to simulate the Diamond MOSFETs (DMs) in the Simulation Program with Integrated Circuit Emphasis (SPICE) because there is still no SPICE model to perform the DM. Additionally, this work proposes a methodology to layout OTAs with Diamond MOSFETs, regarding different values of aspect ratios. The main result of this work reveals a total gate area reduction of approximately 30% of a robust OTA implemented with Diamond MOSFETs, with an alpha angle (α) equal to 45°, with respect to the one observed in the robust OTA implemented with standard MOSFETs, maintaining practically the same electrical performance and robustness.
dc.description.firstpage293
dc.description.issuenumber1
dc.description.lastpage306
dc.description.volume106
dc.identifier.citationBANIN JUNIO, J. R.; MORETO R. A. L.; DA SILVA, G. A.; THOMAZ, C. E.; GIMENEZ, S. Methodology to optimize and reduce the total gate area of robust operational transconductance amplifiers by using diamond layout style for MOSFETs. Analog Integrated Circuits and Signal Processing, v. 106, n. 1, p. 293-306, Jan. 2021.
dc.identifier.doi10.1007/s10470-020-01750-6
dc.identifier.issn1573-1979
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/3610
dc.relation.ispartofAnalog Integrated Circuits and Signal Processing
dc.rightsAcesso Restrito
dc.subject.otherlanguageDesign
dc.subject.otherlanguageDiamond MOSFET
dc.subject.otherlanguageElectronic evolutionary
dc.subject.otherlanguageHexagonal layout style
dc.subject.otherlanguageiMTGSPICE
dc.subject.otherlanguageOperational transconductance amplifier
dc.subject.otherlanguageOptimization
dc.subject.otherlanguageOTA
dc.subject.otherlanguageRobust analog CMOS ICs
dc.subject.otherlanguageSPICE simulation
dc.titleMethodology to optimize and reduce the total gate area of robust operational transconductance amplifiers by using diamond layout style for MOSFETs
dc.typeArtigo
fei.scopus.citations4
fei.scopus.eid2-s2.0-85096366894
fei.scopus.subjectArea reduction
fei.scopus.subjectComplementary metal-oxide-semiconductor (CMOS) integrated circuit
fei.scopus.subjectElectrical performance
fei.scopus.subjectElectronic design
fei.scopus.subjectOptimization techniques
fei.scopus.subjectRadio frequency cmos
fei.scopus.subjectSimulation program with integrated circuit emphasis
fei.scopus.subjectSPICE modeling
fei.scopus.updated2024-11-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85096366894&origin=inward
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