Behavior of Graded Channel SOI Gate-All-Around nMOSFET devices at high temperatures
dc.contributor.advisorOrcid | https://orcid.org/0000-0003-1361-3650 | |
dc.contributor.author | SANTOS, C. D. G. DOS | |
dc.contributor.author | Marcelo Antonio Pavanello | |
dc.contributor.author | MARTINO, J. A. | |
dc.contributor.author | FLANDRE, D. | |
dc.contributor.author | RASKIN, J.-P. | |
dc.date.accessioned | 2023-08-26T23:50:50Z | |
dc.date.available | 2023-08-26T23:50:50Z | |
dc.date.issued | 2004-09-11 | |
dc.description.abstract | This paper presents the behavior of Graded Channel SOI Gate-All-Around (GAA) nMOSFET at high temperatures in the range of 27°C to 300°C. Threshold voltage, subthreshold slope, maximum transconductance, zero temperature coefficient and Early voltage were investigated through three-dimensional simulations and electrical characterization. It was verified that when temperature increases, threshold voltage decreases, subthreshold slope increases and did not suffer any degradation with the LLD/L ratio increase. The maximum transconductance decreases when temperature increases, and increases for larger LLD/L ratios, and Early voltage decreases almost linearly with temperature increase. The results show the excellent behavior of GC SOI GAA nMOSFET at high temperatures compared to conventional SOI GAA devices. | |
dc.description.firstpage | 9 | |
dc.description.lastpage | 14 | |
dc.description.volume | 3 | |
dc.identifier.citation | SANTOS, C. D. G. DOS; PAVANELLO, M. A.; MARTINO, J. A.; FLANDRE, D.;RASKIN, J.-P. Behavior of Graded Channel SOI Gate-All-Around nMOSFET devices at high temperatures. Proceedings - Electrochemical Society, v. 3, p. 9-14, sept. 2003. | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/5060 | |
dc.relation.ispartof | Proceedings - Electrochemical Society | |
dc.rights | Acesso Restrito | |
dc.title | Behavior of Graded Channel SOI Gate-All-Around nMOSFET devices at high temperatures | |
dc.type | Artigo de evento | |
fei.scopus.citations | 1 | |
fei.scopus.eid | 2-s2.0-17044435490 | |
fei.scopus.subject | Analog application | |
fei.scopus.subject | Graded channel | |
fei.scopus.subject | Low doped region | |
fei.scopus.subject | Operational transconductance amplifier | |
fei.scopus.updated | 2024-05-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=17044435490&origin=inward |