Channel length influence on the analog characteristics of asymmetric self-cascode association of SOI transistors

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dc.contributor.authorDE SOUZA, M.
dc.contributor.authorFLANDRE. D.
dc.contributor.authorMarcelo Antonio Pavanello
dc.contributor.authorOrcidhttps://orcid.org/0000-0003-1361-3650
dc.date.accessioned2022-06-01T06:08:15Z
dc.date.available2022-06-01T06:08:15Z
dc.date.issued2013-09-06
dc.description.abstractThis paper presents an experimental analysis of channel length influence on the analog characteristics of asymmetric self-cascode association of SOI transistors. It is shown that the increase of the drain current and transconductance is more pronounced with the reduction of the length of the transistor close to the source (L1), and, differently from the symmetric self-cascode, suffers little influence of the length close to the drain (L2). On the contrary, the output conductance of symmetric and asymmetric threshold voltage structures is benefited by the increase of L 2 and L1, although the asymmetric structure may offer a reduction of up to one order of magnitude in comparison to the symmetric one. It results in larger intrinsic voltage drain for asymmetric devices. This increase has shown to reach more than 20 dB for similar dimensions, or allow for dimension reduction without intrinsic gain degradation. © 2013 IEEE.
dc.identifier.citationDE SOUZA, M.; FLANDRE. D.; PAVANELLO, M. A. Channel length influence on the analog characteristics of asymmetric self-cascode association of SOI transistors. Chip in Curitiba 2013 - SBMicro 2013: 28th Symposium on Microelectronics Technology and Devices. Sept. 2013.
dc.identifier.doi10.1109/SBMicro.2013.6676154
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/4513
dc.relation.ispartofChip in Curitiba 2013 - SBMicro 2013: 28th Symposium on Microelectronics Technology and Devices
dc.rightsAcesso Restrito
dc.subject.otherlanguageAnalog Parameters
dc.subject.otherlanguageAsymmetric Self-cascode
dc.subject.otherlanguageSOI MOSFET
dc.titleChannel length influence on the analog characteristics of asymmetric self-cascode association of SOI transistors
dc.typeArtigo de evento
fei.scopus.citations10
fei.scopus.eid2-s2.0-84893449157
fei.scopus.subjectAnalog parameters
fei.scopus.subjectAsymmetric structures
fei.scopus.subjectDimension reduction
fei.scopus.subjectExperimental analysis
fei.scopus.subjectGain degradations
fei.scopus.subjectOutput conductance
fei.scopus.subjectSelf-cascode
fei.scopus.subjectSOI-MOSFETs
fei.scopus.updated2024-07-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84893449157&origin=inward
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