Substrate bias influence on the operation of junctionless nanowire transistors
dc.contributor.author | Trevisoli R. | |
dc.contributor.author | Doria R.T. | |
dc.contributor.author | De Souza M. | |
dc.contributor.author | Pavanello M.A. | |
dc.date.accessioned | 2019-08-19T23:45:13Z | |
dc.date.available | 2019-08-19T23:45:13Z | |
dc.date.issued | 2014 | |
dc.description.abstract | The aim of this paper is to analyze the substrate bias influence on the operation of junctionless nanowire transistors based on 3-D simulated and experimental results, accomplished by modeled data. The threshold voltage, the maximum transconductance, the subthreshold slope, the drain-induced barrier lowering (DIBL), and the ION/IOFF ratio are the key parameters under analysis. It has been shown that the negative back bias can reduce the short-channel effects occurrence, improving the ION/ OFF ratio and DIBL. © 1963-2012 IEEE. | |
dc.description.firstpage | 1575 | |
dc.description.issuenumber | 5 | |
dc.description.lastpage | 1582 | |
dc.description.volume | 61 | |
dc.identifier.citation | TREVISOLI, Renan Doria; DORIA, Rodrigo Trevisoli; DE SOUZA, Michelly; PAVANELLO, Marcelo A.. Substrate Bias Influence on the Operation of Junctionless Nanowire Transistors. IEEE Transactions on Electron Devices, v. 61, n. 5, p. 1575-1582, 2014. | |
dc.identifier.doi | 10.1109/TED.2014.2309334 | |
dc.identifier.issn | 0018-9383 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/1142 | |
dc.relation.ispartof | IEEE Transactions on Electron Devices | |
dc.rights | Acesso Restrito | |
dc.subject.otherlanguage | Junctionless transistors | |
dc.subject.otherlanguage | maximum transconductance | |
dc.subject.otherlanguage | substrate bias | |
dc.subject.otherlanguage | subthreshold slope | |
dc.subject.otherlanguage | threshold voltage | |
dc.title | Substrate bias influence on the operation of junctionless nanowire transistors | |
dc.type | Artigo | |
fei.scopus.citations | 36 | |
fei.scopus.eid | 2-s2.0-84899907606 | |
fei.scopus.subject | Back bias | |
fei.scopus.subject | Drain-induced barrier lowering | |
fei.scopus.subject | Junctionless transistors | |
fei.scopus.subject | Maximum transconductance | |
fei.scopus.subject | Nanowire transistors | |
fei.scopus.subject | Short-channel effect | |
fei.scopus.subject | Substrate bias | |
fei.scopus.subject | Subthreshold slope | |
fei.scopus.updated | 2024-07-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84899907606&origin=inward |