Analysis of uniaxial and biaxial strain impact on the linearity of fully depleted SOI nMOSFETs

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dc.contributor.authorPavanello M.A.
dc.contributor.authorMartino J.A.
dc.contributor.authorSimoen E.
dc.contributor.authorClaeys C.
dc.date.accessioned2019-08-19T23:45:08Z
dc.date.available2019-08-19T23:45:08Z
dc.date.issued2007
dc.description.abstractThis work studies the impact of uniaxial, biaxial and combined uniaxial-biaxial strain on the linearity of nMOSFETs from a 65 nm fully depleted (FD) SOI technology. The total harmonic distortion (THD) and third-order harmonic distortion (HD3) will be used as figures of merit. Operation in saturation and triode regimes will be the focus. When biased in the saturation region short-channel devices have been used and biased as single-transistor amplifiers. In this case, at low voltage bias the use of any kind of strain improves the THD in comparison to standard SOI. When operating in linear region as a quasi-linear resistor longer devices were studied. For operation in linear regime the HD3 is nearly the same for all devices and no clear strain influence can be found at similar bias condition. If a target on-resistance is considered, the use of biaxially or combined unxially-biaxially strained films can provide a reduction on the required gate voltage overdrive or a reduction on the device channel width without degrading the HD3. © 2007 Elsevier Ltd. All rights reserved.
dc.description.firstpage1194
dc.description.issuenumber9
dc.description.lastpage1200
dc.description.volume51
dc.identifier.citationPAVANELLO, Marcelo A.; MARTINO, João Antonio; SIMOEN, Eddy; CLAEYS, Cor. Analysis of uniaxial and biaxial strain impact on the linearity of fully depleted SOI nMOSFETs. Solid-State Electronics, v. 51, n. 9, p. 1194-1200, 2007.
dc.identifier.doi10.1016/j.sse.2007.07.016
dc.identifier.issn0038-1101
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1069
dc.relation.ispartofSolid-State Electronics
dc.rightsAcesso Restrito
dc.titleAnalysis of uniaxial and biaxial strain impact on the linearity of fully depleted SOI nMOSFETs
dc.typeArtigo
fei.scopus.citations4
fei.scopus.eid2-s2.0-34548561809
fei.scopus.subjectBiaxial strain
fei.scopus.subjectGate voltage
fei.scopus.subjectShort-channel devices
fei.scopus.updated2024-05-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=34548561809&origin=inward
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