Halo effects on 0.13 μm floating-body partially depleted SOI n-Mosfets in low temperature operation

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dc.contributor.advisorOrcidhttps://orcid.org/0000-0003-1361-3650
dc.contributor.authorMARTINO, J. A.
dc.contributor.authorMarcelo Antonio Pavanello
dc.contributor.authorSIMOEN, E.
dc.contributor.authorCLAEYS, C.
dc.date.accessioned2023-08-26T23:51:00Z
dc.date.available2023-08-26T23:51:00Z
dc.date.issued2003-10-12
dc.description.abstractThis work studies the effect of halo implantation on the electrical characteristics of deep-submicrometer partially depleted SOI nMOSFETs during low temperature and floating body operation, Parameters such as the Drain Induced Barrier Lowering and the device thermal resistance have been investigated. It is shown that the combination of floating body operation with halo implantation degrades the DIBL in the temperature range studied (90 - 300 K) in comparison to devices that did not received this implantation. The halo region causes a more pronounced negative output conductance than for the transistors without a halo implantation. An estimation of the temperature rise for a given dissipated power in both types of devices is made, based on the thermal resistance, which is derived from the output characteristics in function of the temperature.
dc.description.firstpage3
dc.description.lastpage15
dc.description.volume27
dc.identifier.citationMARTINO, J. A.; PAVANELLO, M. A.; SIMOEN, E.; CLAEYS, C. Halo effects on 0.13 μm floating-body partially depleted SOI n-Mosfets in low temperature operation. Proceedings - Electrochemical Society, v. 27, p. 3-15, 2003.
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/5071
dc.relation.ispartofProceedings - Electrochemical Society
dc.rightsAcesso Restrito
dc.titleHalo effects on 0.13 μm floating-body partially depleted SOI n-Mosfets in low temperature operation
dc.typeArtigo de evento
fei.scopus.citations1
fei.scopus.eid2-s2.0-21644462262
fei.scopus.subjectFloating body operations
fei.scopus.subjectHalo implantation
fei.scopus.subjectShort-channel effects
fei.scopus.subjectSilicon-on-insulator (SOI)
fei.scopus.updated2024-12-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=21644462262&origin=inward
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