Innovative layout styles to boost the MOSFET electrical performance
Nenhuma Miniatura disponível
Citações na Scopus
3
Tipo de produção
Artigo de evento
Data
2014-01-05
Autores
Salvador Gimenez
Orientador
Periódico
ECS Transactions
Título da Revista
ISSN da Revista
Título de Volume
Citação
GIMENEZ, S. Innovative layout styles to boost the MOSFET electrical performance. ECS Transactions, v. 60, n. 1, p. 121-126, Jan. 2014.
Texto completo (DOI)
Palavras-chave
Resumo
This paper describes how to potentiate the electrical performance of MOSFETs using non-conventional layout styles (rectangular gate geometry), without causing any extra burden to the current ICs manufacturing CMOS process. This layout approach is based on "drain-channel region-source interfaces engineering", which is capable to add new effects to the MOSFET structure that contributes to improve the analog and digital electrical parameters of MOSFETs. Besides that, some of these new structures can enhance the transistor robustness in harsh environment (high temperature and radiation). Furthermore, as a first insight into exploration of this layout approach was applied in Multi-Gate MOSFETs (FinFET) by three-dimensional simulations and the results are very promising. © 2014 The Electrochemical Society.