Reducing Soft Error Rate of SoCs Analog-to-Digital Interfaces with Design Diversity Redundancy

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dc.contributor.authorGONZALEZ, C. J.
dc.contributor.authorADDED, N.
dc.contributor.authorMACCHIONE, E. L. A.
dc.contributor.authorAGUIAR, V. A. P.
dc.contributor.authorKASTENSMIDT, F. G. L.
dc.contributor.authorPUCHNER, H. K.
dc.contributor.authorMarcilei Aparecida Guazzelli
dc.contributor.authorMEDINA, N. H.
dc.contributor.authorBALEN, T. R.
dc.contributor.authorOrcidhttps://orcid.org/0000-0001-7110-7241
dc.date.accessioned2022-01-12T21:55:23Z
dc.date.available2022-01-12T21:55:23Z
dc.date.issued2020-03-05
dc.description.abstract© 1963-2012 IEEE.In this article, a commercial programmable system-on-chip (PSoC 5, from Cypress Semiconductor) is tested under heavy-ion irradiation with a focus on the analog-to-digital interface blocks of the system. For this purpose, a data acquisition system (DAS) was programmed into the device under test and protected with a design diversity redundancy technique. This technique implements different levels of diversity (architectural and temporal) by using two different architectures of converters (a Σ Δ converter and two successive approximation register (SAR) converters) operating with distinct sampling rates. The experiment was performed in a vacuum chamber, using a 16O ion beam with 36-MeV energy and sufficient penetration into the silicon to produce an effective linear energy transfer (LET) of 5.5 MeV/mg/cm2 at the active region. The average flux was approximately 350 particles/s/cm2 for 246 min. The individual susceptibility of each converter to single-event effects is evaluated, as well as the whole system cross section. Results show that the proposed technique is effective to mitigate errors originating at the converters since 100% of such errors were corrected by using the diversity redundancy technique. Results also show that the processing unit of the system is susceptible to hangs that can be mitigated using watchdog techniques.
dc.description.firstpage518
dc.description.issuenumber3
dc.description.lastpage524
dc.description.volume67
dc.identifier.citationGONZALEZ, C. J.; ADDED, N.; MACCHIONE, E. L. A.; AGUIAR, V. A. P.; KASTENSMIDT, F. G. L.; PUCHNER, H. K.; GUAZZELLI, M. A.; MEDINA, N. H.; BALEN, T. R. Reducing Soft Error Rate of SoCs Analog-to-Digital Interfaces with Design Diversity Redundancy. IEEE Transactions on Nuclear Science, v. 67, n. 3, p. 518-524, march, 2020.
dc.identifier.doi10.1109/TNS.2019.2952775
dc.identifier.issn1558-1578
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/3655
dc.relation.ispartofIEEE Transactions on Nuclear Science
dc.rightsAcesso Restrito
dc.subject.otherlanguageDesign diversity
dc.subject.otherlanguagemixed signal
dc.subject.otherlanguageprogrammable system-on-chip (PSoC)
dc.subject.otherlanguagesingle-event effects (SEEs)
dc.subject.otherlanguagesoft errors
dc.titleReducing Soft Error Rate of SoCs Analog-to-Digital Interfaces with Design Diversity Redundancy
dc.typeArtigo
fei.scopus.citations5
fei.scopus.eid2-s2.0-85082034137
fei.scopus.subjectDesign diversity
fei.scopus.subjectMixed signal
fei.scopus.subjectProgrammable system on chips
fei.scopus.subjectSingle event effects
fei.scopus.subjectSoft error
fei.scopus.updated2024-07-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85082034137&origin=inward
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