Compact modeling of triple gate junctionless MOSFETs for accurate circuit design in a wide temperature range

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dc.contributor.authorPavanello M.A.
dc.contributor.authorCerdeira A.
dc.contributor.authorDoria R.T.
dc.contributor.authorRibeiro T.A.
dc.contributor.authorAvila-Herrera F.
dc.contributor.authorEstrada M.
dc.date.accessioned2019-08-19T23:45:13Z
dc.date.available2019-08-19T23:45:13Z
dc.date.issued2019
dc.description.abstract© 2019 Elsevier LtdThis paper presents the extension of proposed physically-based continuous compact analytical model of triple gate junctionless nanowire transistors for accurate description of device electrical characteristics in a wide temperature range from room temperature up to 500 K. The model validation is performed by comparison against tridimensional numerical simulation and experimental data showing very good agreement, with continuous description of drain current and its derivatives in all regions of operation and temperatures.
dc.description.firstpage116
dc.description.lastpage122
dc.description.volume159
dc.identifier.citationPavanello, Marcelo A.; CERDEIRA, Antonio; Doria, Rodrigo Trevisoli; RIBEIRO, Thales Augusto; HERRERA, FERNANDO AVILA; ESTRADA, MAGALI. Compact Modeling of Triple Gate Junctionless Mosfets for Accurate Circuit Design in a Wide Temperature Range. SOLID-STATE ELECTRONICS, v. 159, p. 116-122, 2019.
dc.identifier.doi10.1016/j.sse.2019.03.034
dc.identifier.issn0038-1101
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1137
dc.relation.ispartofSolid-State Electronics
dc.rightsAcesso Restrito
dc.subject.otherlanguageCompact model
dc.subject.otherlanguageJunctionless nanowire transistor
dc.subject.otherlanguageTemperature
dc.titleCompact modeling of triple gate junctionless MOSFETs for accurate circuit design in a wide temperature range
dc.typeArtigo
fei.scopus.citations9
fei.scopus.eid2-s2.0-85063368318
fei.scopus.subjectCircuit designs
fei.scopus.subjectCompact model
fei.scopus.subjectElectrical characteristic
fei.scopus.subjectModel validation
fei.scopus.subjectNanowire transistors
fei.scopus.subjectPhysically based
fei.scopus.subjectTriple-gate
fei.scopus.subjectWide temperature ranges
fei.scopus.updated2024-05-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85063368318&origin=inward
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