Lockstep Dual-Core ARM A9: Implementation and Resilience Analysis under Heavy Ion-Induced Soft Errors

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dc.contributor.authorDE OLIVEIRA, A. B.
dc.contributor.authorRODRIGUES, G. S.
dc.contributor.authorKASTENSMDT, F. L.
dc.contributor.authorADDED, N.
dc.contributor.authorMACCHIONE, E. L. A.
dc.contributor.authorAGUIAR, V . A. P.
dc.contributor.authorMEDINA N. H.
dc.contributor.authorSalvador Gimenez
dc.contributor.authorOrcidhttps://orcid.org/0000-0002-3616-9559
dc.date.accessioned2022-01-12T21:57:16Z
dc.date.available2022-01-12T21:57:16Z
dc.date.issued2018-08-05
dc.description.abstract© 1963-2012 IEEE.This paper presents a dual-core lockstep (DCLS) implementation to protect hard-core processors against radiation-induced soft errors. The proposed DCLS is applied to an Advanced RISC Machine Cortex-A9 embedded processor. Different software optimizations were evaluated to assess their impact on performance and fault tolerance. Heavy ions' experiments and fault injection emulation were performed to analyze the system susceptibility to errors and the DCLS performance. Results show that the approach is able to decrease the system cross section and achieve high protection against errors. The DCLS successfully protects the system from up to 78% of the injected faults. The execution performance analysis shows that by reducing the number of verifications and augmenting the block partition execution time, it is possible to increase the system reliability with minimal performance losses.
dc.description.firstpage1783
dc.description.issuenumber8
dc.description.lastpage1790
dc.description.volume65
dc.identifier.citationDE OLIVEIRA, A. B.; RODRIGUES, G. S.; KASTENSMDT, F. L.; MACCHIONE, E. L. A.; AGUIAR, V . A. P. MEDINA N. H.; GIMENEZ, S. Lockstep Dual-Core ARM A9: Implementation and Resilience Analysis under Heavy Ion-Induced Soft Errors. IEEE Transactions on Nuclear Science, v. 65, n. 8, p. 1783-1790, Aug. 2018.
dc.identifier.doi10.1109/TNS.2018.2852606
dc.identifier.issn0018-9499
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/3781
dc.relation.ispartofIEEE Transactions on Nuclear Science
dc.rightsAcesso Restrito
dc.subject.otherlanguageEmbedded processors reliability
dc.subject.otherlanguagefault injection
dc.subject.otherlanguagefault tolerance
dc.subject.otherlanguageheavy ions
dc.subject.otherlanguagelockstep
dc.subject.otherlanguageradiation experiments
dc.subject.otherlanguagesoft error
dc.titleLockstep Dual-Core ARM A9: Implementation and Resilience Analysis under Heavy Ion-Induced Soft Errors
dc.typeArtigo
fei.scopus.citations35
fei.scopus.eid2-s2.0-85049356339
fei.scopus.subjectEmbedded processors
fei.scopus.subjectFault injection
fei.scopus.subjectLockstep
fei.scopus.subjectRadiation experiment
fei.scopus.subjectSoft error
fei.scopus.updated2024-07-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85049356339&origin=inward
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