Analysis of bulk and accumulation mobilities in n- and p-type triple gate junctionless nanowire transistors
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2017-07-28
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RIBEIRO, T. A.
Marcelo Antonio Pavanello
CERDEIRA, A.
Marcelo Antonio Pavanello
CERDEIRA, A.
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SBMicro 2017 - 32nd Symposium on Microelectronics Technology and Devices: Chip on the Sands, co-located Symposia: 30th SBCCI - Circuits and Systems Design, 2nd INSCIT - Electronic Instrumentation, 7th WCAS - IC Design Cases and 17th SForum - Undergraduate-Student Forum
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RIBEIRO, T. A.; PAVANELLO, M. A.; CERDEIRA, A. Analysis of bulk and accumulation mobilities in n- and p-type triple gate junctionless nanowire transistors. In. SIMPÓSIO DE TECNOLOGIA E DISPOSITIVOS MICROELETRÔNICOS: CHIP ON THE SANDS, SBMICRO, 32., 2017, Fortaleza: SBMicro 2017 - 32º Simpósio de Tecnologia e Dispositivos Microeletrônicos: Chip on the Sands, co-localizado Simpósios: 30º SBCCI - Projeto de Circuitos e Sistemas, 2º INSCIT - Instrumentação Eletrônica, 7º WCAS - Casos de Design de IC e 17º SForum - Fórum de Estudantes de Graduação, 2017.
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This paper studies the effective mobility in n- and p-type junctionless nanowire transistors (JNT) with variable fin width from quasi-planar to nanowire devices. JNTs electrical parameters were analyzed and the results show that smaller fin width have higher mobility while the mobility decreases for quasi-planar devices. Simulations were used to analyze the mobility showing that small fin devices reach higher mobility for smaller gate bias variation above the threshold voltage and a higher mobility in the middle of the channel due to the better electrostatic coupling compared to larger devices.