A simple method to model nonrectangular-gate layout in SOI MOSFETs

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dc.contributor.authorRenato Giacomini
dc.contributor.authorMARTINO, J. A.
dc.contributor.authorOrcidhttps://orcid.org/0000-0003-1060-2649
dc.date.accessioned2023-08-26T23:50:42Z
dc.date.available2023-08-26T23:50:42Z
dc.date.issued2005-09-07
dc.description.abstractA simple method to obtain an analytical current model for nonrectangulargate layout in SOI MOSFETs is presented, based on partition of the original layout into trapezoidal parts, and modeling these trapezoids by a closed form expression. A generic shape factor is defined for comparison between devices of different shapes in the same technology. Three-dimensional simulation and some experimental results were carried out to verify the method accurateness. The obtained expression showed good agreement both to simulation and experimental results. The method can be applied to a wide range of gate layout shapes.
dc.description.firstpage472
dc.description.lastpage481
dc.description.volumePV 2005-08
dc.identifier.citationGIACOMINI, R.; MARTINO, J. A. A simple method to model nonrectangular-gate layout in SOI MOSFETs. Proceedings - Electrochemical Society, v. PV 2005-08, p. 472-481, sept. 2005.
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/5052
dc.relation.ispartofProceedings - Electrochemical Society
dc.rightsAcesso Restrito
dc.titleA simple method to model nonrectangular-gate layout in SOI MOSFETs
dc.typeArtigo de evento
fei.scopus.citations0
fei.scopus.eid2-s2.0-31744440227
fei.scopus.subjectClosed form applications
fei.scopus.subjectGeneric shape factor
fei.scopus.subjectNonrectangular-gate layout
fei.scopus.updated2024-07-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=31744440227&origin=inward
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