Short channel continuous model for double-gate junctionless transistors
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2014-01-20
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PAZ, B. C.
Marcelo Antonio Pavanello
AVILA, F.
CERDEIRA, A.
Marcelo Antonio Pavanello
AVILA, F.
CERDEIRA, A.
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2014 International Caribbean Conference on Devices, Circuits and Systems, ICCDCS 2014 - Conference Proceedings
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PAZ, B. C.; PAVANELLO, M. A.; AVILA, F.; CERDEIRA, A. Short channel continuous model for double-gate junctionless transistors. 2014 International Caribbean Conference on Devices, Circuits and Systems, ICCDCS 2014 - Conference Proceedings. Jan. 2014.
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This work aims to present a continuous model of the drain current for short channel double-gate junctionless transistors, from a charge-based model for long channel double-gate devices. The proposed model is based on the influence of the drain bias in the channel potential and the reduction of the effective channel length in saturation regime, for short channel transistors. To model validation it will be used three dimensional numerical simulations.