Impact of the series resistance in the I-V characteristics of nMOS junctionless nanowire transistors
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2011-09-02
Autores
Rodrigo Doria
TREVISOLI, D. T.
Marcelo Antonio Pavanello
TREVISOLI, D. T.
Marcelo Antonio Pavanello
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ECS Transactions
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DORIA, R.; TREVISOLI, D. T.; PAVANELLO, M. A. Impact of the series resistance in the I-V characteristics of nMOS junctionless nanowire transistors. ECS Transactions, v. 39, n.1, p. 231-238. Sept, 2011.
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The series resistance (Rs) of Junctionless Nanowire Transistors (JNTs) with different doping concentrations was extracted from 473 K down to 100 K. The source/drain parasitic resistance presented by JNTs was compared to the one presented by classical inversion mode (IM) triple gate devices and the impact of the series resistance on the drain current of the devices was evaluated. The R S analysis was carried out through experimental results and devices tridimensional numerical simulations. According to the study, R S presents opposite behavior with the temperature variation in EVI triple transistors and JNTs. In the latter, a reduction on R S is noted with the temperature increase, whereas a resistance decrease is obtained with the temperature lowering in IM devices. The parasitic resistance in JNTs affects the drain current in such a way that there may not be a Zero Temperature Coefficient (ZTC) operation point. © The Electrochemical Society.