Analysis of the scattering mechanisms in the accumulation layer of junctionless nanowire transistors at high temperature
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2019-08-05
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RIBEIRO, T. A.
Marcelo Antonio Pavanello
Marcelo Antonio Pavanello
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SBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices
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RIBEIRO, T. A.; PAVANELLO, M. A. Analysis of the scattering mechanisms in the accumulation layer of junctionless nanowire transistors at high temperature. SBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices, aug. 2019.
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© 2019 IEEE.This work studies the effects of high temperature on the scattering mechanisms of Junctionless Nanowire Transistors with several fin width from nanowire to quasi-planar devices. With the variation of the temperature it was possible to analyze the impact of the scattering mechanisms on the devices. For nanowire devices at room temperature a degradation of up to 19% was seen from the maximum mobility to the mobility at higher gate bias to around 15% at 500K, while quasi-planar devices show a degradation of around 12% for all temperatures. Further analysis shows that the impact of the surface roughness for nanowires increase the degradation of these devices, where a reduction of its degradation at higher temperature shows the phonon scattering as the main scattering mechanism.