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Improved analog performance of SOI Nanowire nMOSFETs Self-Cascode through back-biasing

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dc.contributor.authorASSALTI, R.
dc.contributor.authorMichelly De Souza
dc.contributor.authorCASSE, M.
dc.contributor.authorBARRAUD, S.
dc.contributor.authorREIMBOLD, G.
dc.contributor.authorVINET, M.
dc.contributor.authorFAYNOT, O.
dc.contributor.authorOrcidhttps://orcid.org/0000-0001-6472-4807
dc.date.accessioned2022-01-12T21:58:05Z
dc.date.available2022-01-12T21:58:05Z
dc.date.issued2017-06-29
dc.description.abstract© 2017 IEEE.In this paper the analog performance of the Self-Cascode structure composed by SOI Nanowire nMOSFETs has been evaluated through experimental results. The influence of the channel width of the transistors near the source and the drain, and the back gate voltage variation have been evaluated.
dc.description.firstpage83
dc.description.lastpage86
dc.identifier.citationASSALTI, R.; DE SOUZA, M.; CASSE, M.; BARRAUD, S.; REIMBOLD, G.; VINET, M.; FAYNOT, O. Improved analog performance of SOI Nanowire nMOSFETs Self-Cascode through back-biasing. Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Proceedings, p. 83-86, jun. 2017.
dc.identifier.doi10.1109/ULIS.2017.7962607
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/3838
dc.relation.ispartofJoint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Proceedings
dc.rightsAcesso Restrito
dc.subject.otherlanguageanalog performance
dc.subject.otherlanguageasymmetric self-cascode
dc.subject.otherlanguageback gate voltage
dc.subject.otherlanguagechannel width
dc.subject.otherlanguagesilicon nanowire
dc.titleImproved analog performance of SOI Nanowire nMOSFETs Self-Cascode through back-biasing
dc.typeArtigo de evento
fei.scopus.citations1
fei.scopus.eid2-s2.0-85026765344
fei.scopus.subjectAnalog performance
fei.scopus.subjectBack-gate voltages
fei.scopus.subjectChannel widths
fei.scopus.subjectSelf-cascode
fei.scopus.subjectSilicon nanowires
fei.scopus.updated2025-02-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=85026765344&origin=inward

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