Analysis of charges densities in multiple-gates SOI nMOS junctionless
N/D
Tipo de produção
Artigo de evento
Data de publicação
2013-09-06
Texto completo (DOI)
Periódico
Chip in Curitiba 2013 - SBMicro 2013: 28th Symposium on Microelectronics Technology and Devices
Editor
Texto completo na Scopus
Citações na Scopus
2
Autores
MARINIELLO, G.
CERDEIRA, A.
ESTRADA, M.
Rodrido Doria
TREVISOLI, R. D.
Michelly De Souza
Marcelo Antonio Pavanello
Orientadores
Resumo
This paper aims to analyze the charges density in multiple gates junctionless devices with different dimensions The analysis of the charge densities was done at the center of the silicon film, at the sidewall and at the top interfaces between the silicon and the gate oxide, for devices with different fin width, height and gate oxide tickness. Based on this analisys, the occurrence of corner effects in Junctionless devices is investigated. © 2013 IEEE.
Citação
MARINIELLO, G.; CERDEIRA, A.; ESTRADA, M.; DORIA, R.; TREVISOLI, R. D.; DE SOUZA, M.; PAVANELLO, M. A. Analysis of charges densities in multiple-gates SOI nMOS junctionless. Chip in Curitiba 2013 - SBMicro 2013: 28th Symposium on Microelectronics Technology and Devices, Sept. 2013.
Palavras-chave
Keywords
Charge density; Corner effect; Junctionless transistor
Assuntos Scopus
Corner effects; Fin widths; Gate oxide; Junctionless devices; Junctionless transistors; Multiple gates; Silicon films