Analysis of charges densities in multiple-gates SOI nMOS junctionless

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dc.contributor.authorMARINIELLO, G.
dc.contributor.authorCERDEIRA, A.
dc.contributor.authorESTRADA, M.
dc.contributor.authorRodrido Doria
dc.contributor.authorTREVISOLI, R. D.
dc.contributor.authorMichelly De Souza
dc.contributor.authorMarcelo Antonio Pavanello
dc.contributor.authorOrcidhttps://orcid.org/0000-0003-4448-4337
dc.contributor.authorOrcidhttps://orcid.org/0000-0001-6472-4807
dc.contributor.authorOrcidhttps://orcid.org/0000-0003-1361-3650
dc.date.accessioned2022-01-12T22:01:48Z
dc.date.available2022-01-12T22:01:48Z
dc.date.issued2013-09-06
dc.description.abstractThis paper aims to analyze the charges density in multiple gates junctionless devices with different dimensions The analysis of the charge densities was done at the center of the silicon film, at the sidewall and at the top interfaces between the silicon and the gate oxide, for devices with different fin width, height and gate oxide tickness. Based on this analisys, the occurrence of corner effects in Junctionless devices is investigated. © 2013 IEEE.
dc.identifier.citationMARINIELLO, G.; CERDEIRA, A.; ESTRADA, M.; DORIA, R.; TREVISOLI, R. D.; DE SOUZA, M.; PAVANELLO, M. A. Analysis of charges densities in multiple-gates SOI nMOS junctionless. Chip in Curitiba 2013 - SBMicro 2013: 28th Symposium on Microelectronics Technology and Devices, Sept. 2013.
dc.identifier.doi10.1109/SBMicro.2013.6676177
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/4093
dc.relation.ispartofChip in Curitiba 2013 - SBMicro 2013: 28th Symposium on Microelectronics Technology and Devices
dc.rightsAcesso Restrito
dc.subject.otherlanguageCharge density
dc.subject.otherlanguageCorner effect
dc.subject.otherlanguageJunctionless transistor
dc.titleAnalysis of charges densities in multiple-gates SOI nMOS junctionless
dc.typeArtigo de evento
fei.scopus.citations2
fei.scopus.eid2-s2.0-84893503848
fei.scopus.subjectCorner effects
fei.scopus.subjectFin widths
fei.scopus.subjectGate oxide
fei.scopus.subjectJunctionless devices
fei.scopus.subjectJunctionless transistors
fei.scopus.subjectMultiple gates
fei.scopus.subjectSilicon films
fei.scopus.updated2024-07-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84893503848&origin=inward
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