Michelly De SouzaMarcelo Antonio PavanelloCERDEIRA, A.FLANDRE, D.2022-04-012022-04-012006-05-17DE SOUZA, M.; PAVANELLO, M. A.; CERDEIRA, A.; FLANDRE, D.Graded-channel SOI nMOSFET model valid for harmonic distortion evaluation. 2006 25th International Conference on Microelectronics, MIEL 2006 - Proceedings, Mayo, 2006.https://repositorio.fei.edu.br/handle/FEI/4469In this paper an evaluation of the harmonic distortion of graded-channel SOI nMOSFETs is performed. The analysis is carried out by comparing an analytical continuous model and experimental results. The total harmonic distortion, as well as the third and second order terms are used as figures of merit in this comparison. It is shown that GC SOI devices present better gain and linearity behavior than conventional devices and that these advantages are well described by the proposed analytical model. The results show that the proposed set of equations is able to describe the linearity behavior of GC devices, indicating its potential to be used in analog circuit simulation and design. © 2006 IEEE.Acesso RestritoArtigo de evento10.1109/ICMEL.2006.1651005