ASSALTI, R.Michelly De SouzaCASSE, M.BARRAUD, S.REIMBOLD, G.VINET, M.FAYNOT, O.2022-01-122022-01-122018ASSALTI, R.; DE SOUZA, M.; CASSE, M.; BARRAUD, S.; REIMBOLD, G.; VINET, M.; FAYNOT, O. Analog performance of self-cascode SOI nanowires nMOSFETs aiming at low-power applications. 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017, v. 2018-March, p. 1-3, march, 2018.https://repositorio.fei.edu.br/handle/FEI/3795© 2017 IEEE.This paper experimentally explores the analog performance of Self-Cascode structures composed by SOI Nanowire nMOSFETs operating near the subthreshold regime. The composite structure uses transistors with distinct channel widths, biased in several back-gate voltages, to promote different threshold voltages.Acesso RestritoArtigo de evento10.1109/S3S.2017.8309218analog characteristicsasymmetric self-cascodecomposite transistorlow-power electronicssilicon nanowiresubthreshold regime