CERDEIRA, A.AVILA-HERRERA, F.ESTRADA, M.DORIA, R. T.Marcelo Antonio Pavanello2022-01-122022-01-122018-03-19CERDEIRA, A.; AVILA-HERRERA, F.; ESTRADA, M.; DORIA, R. T.; PAVANELLO, M. A. Adaption of triple gate junctionless MOSFETs analytical compact model for accurate circuit design in a wide temperature range. 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2018, p. 1-4, 2018https://repositorio.fei.edu.br/handle/FEI/3788This paper presents the necessary adaptions on the proposed compact analytical model of triple gate junctionless nanowire transistors for accurate description of device electrical characteristics in a wide temperature range. The model validation is performed by comparison against experimental results showing very good agreement, with continuous current and its derivatives in all regions of operation and temperatures.Acesso RestritoArtigo de evento10.1109/ULIS.2018.8354743compact modelJunctioless nanowire transistortemperature