SANTOS, C. D. G. DOSMarcelo Antonio PavanelloMARTINO, J. A.FLANDRE, D.RASKIN, J.-P.2023-08-262023-08-262004-09-11SANTOS, C. D. G. DOS; PAVANELLO, M. A.; MARTINO, J. A.; FLANDRE, D.;RASKIN, J.-P. Behavior of Graded Channel SOI Gate-All-Around nMOSFET devices at high temperatures. Proceedings - Electrochemical Society, v. 3, p. 9-14, sept. 2003.https://repositorio.fei.edu.br/handle/FEI/5060This paper presents the behavior of Graded Channel SOI Gate-All-Around (GAA) nMOSFET at high temperatures in the range of 27°C to 300°C. Threshold voltage, subthreshold slope, maximum transconductance, zero temperature coefficient and Early voltage were investigated through three-dimensional simulations and electrical characterization. It was verified that when temperature increases, threshold voltage decreases, subthreshold slope increases and did not suffer any degradation with the LLD/L ratio increase. The maximum transconductance decreases when temperature increases, and increases for larger LLD/L ratios, and Early voltage decreases almost linearly with temperature increase. The results show the excellent behavior of GC SOI GAA nMOSFET at high temperatures compared to conventional SOI GAA devices.Acesso RestritoArtigo de evento